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CCS/TMS470MF06607: Missing data in generated hex file

Part Number: TMS470MF06607

Tool/software: Code Composer Studio

After successful build, the generated hex file has four byte missing data. This occurs at location where .txt section ends and .const section starts.

There is one word gap between the location where text ends and const starts. 

The .out file has this location filled with "00000000" But hex file doesn't have any data at this location.

Kindly let me know if there is a way to fix the hex file generation so as to generate continuous data without any skip locations.

CCS version used:  5.2.0.00069 

  • Please search the ARM assembly tools manual for the sub-chapter titled Image Mode and the --fill Option.  

    Thanks and regards,

    -George

  • Thanks very much for the response!!

    As per the description of Image mode, All empty location specified in particular range will be filled with fill option values.
    I cannot give fixed memory location for ROMS because the Code size keeps on growing.
    I do not want file to be filled after the end.
    But i want only empty locations in between the hex files.

    For example, In my current case. .txt and .const have a gap. only this gap should be filled.
    Do you have an idea why this kind of behavior could exist for few software versions and for few its does not. 
     
     

  • Does the solution I discuss in your other thread answer this one too?

    Thanks and regards,

    -George

  • No. The method in the other thread would not be correct way to do it for this issue.

    I used Palign(8) instead of Palign(4) after .txt and then it seems to work for current software but I don't understand the behavior.

    Palign(4) should be working.


    .txt end location 0x41844
    .const start location is 0x41848

    I wonder why the gap of 4 bytes.
    Palign(4) should work and the .const start location should be 0x41844 since it is already aligned to 4 bytes.
  • Kavya Ramachandra said:
    I do not want file to be filled after the end.

    Image mode is not designed to solve that problem.  The presumption is the ROMS directive uses the actual address and size of the ROM memory in the system.  Filling it out to the end is normally not a concern.

    Kavya Ramachandra said:
    Do you have an idea why this kind of behavior could exist for few software versions and for few its does not. 

    What different versions do you mean?  The different versions of your system?  Or different versions of the TI toolchain?

    Thanks and regards,

    -George

  • Kavya Ramachandra said:
    .txt end location 0x41844
    .const start location is 0x41848

    I wonder why the gap of 4 bytes.
    Palign(4) should work and the .const start location should be 0x41844 since it is already aligned to 4 bytes.

    To explain that, I need to reproduce it.  Is this organized as a CCS project?  If so, please zip it up as described in the article Project Sharing, and attach that zip file to your next post.

    Thanks and regards,

    -George

  • Please supply the requested CCS project.

    Thanks and regards,

    -George

  • Hi George,

    I am sorry for the delay in response. I was not sure if I could share project setting from my company in a public forum.

    And also a member from TI visited our company So we were discussing.

    We showed the project settings and there was no concern reported from him as well. Most settings are default recommended settings.

    When I used palign(8), the issue was resolved. I looked up in internet and I found below explanation.

    "since the ECC on all current Hercuels devices is calculated on a 64 bit or 8 byte boundary all data and code sections which are placed in the on-chip flash should also be aligned to a 64 bit boundary. They furthermore should also end at 64 bit boundaries to ensure that the complete section will have a length of a multiple of 64 bits and is entirely be initialized. The easiest way to achieve this to use palign(8) on all output sections ind the Linker Command File which will be placed in the on-chip flash"

     

    We are using TMS470 which I believe is also a Hercuels device. So this might be an explanation to why 8 byte padding should be used.

    TI employee who visited has not yet confirmed me on this point.

    Thanks & Regards,

    Kavya