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Trouble configuring I2C registers with CCS 4.2 Chip Lib

Bob Buksa
Prodigy 125 points

System Setup

- CCS 4.2
- TI5502

I am using the following code to configure the I2C registers, but at least two of the registers (I2CCLKH, I2CPSC) do not get updated:

I2C_Config configLCM = {

0,                     

/* I2COAR own address /
0,                     /* I2CIER interrupt enable */
0xEFFF,                /* I2CSTR status register, don't mask Bus Busy, want to check on init */
22,                    /* I2CCLKL low clock divisor */
21,                    /* I2CCLKH high clock divisor */
0,                     /* I2CCNT count register, don't care at this time */
ADC_ADDR_LCM,          /* I2CSAR slave address register */
0x4420,                /* I2CMDR mode (emu freemode,Master, EnableI2C) */
0,                     /* I2CISRC (has a TESTMODE bit which should be 0) */
14                     /* I2CPSC prescaler */
};

I2C_config(configLCM);

i2cCLKH = I2C_RGET(I2CCLKH);
i2cPSC = I2C_RGET(I2CPSC);

Both these registers are set to zero verses 21 and 14 respectively.  When I ran this same code with my CCS 2.21 platform, I2C_config() correctly configures all the I2C registers.

  • 0
    TI__Guru**** 163035 points

    Bob,

    If you load this same program in CCSv2.21 do the register values show correctly?  This could be a CCS issue versus an issue with the Library.

    John

  • 0 in reply to JohnS
    TI__Guru*** 125430 points

    I believe this is a straight-up CSL issue.  Please see this post:

    C5509A and Setting I2C I2CCLKH register

    I believe there are ultimately 2-3 problems:

    1.  The I2C_init code initializes I2CPSC after setting IRS=1 (it's required that PSC be configured while IRS=0).

    2.  The CLKL/CLKH registers not initialized correctly.  I haven't been able to look more closely into that one yet, but the post I referenced mentions it.

    3.  You may also need the bus busy workaround in that thread if you don't have it already.


  • 0 in reply to JohnS
    Prodigy 125 points

    Yes ... This same code works fine with CCS 2.21.  I was really surprised to these registers not beeing configured.  I also tried to force them to be set with I2C_RSET and that did not work either.  Are there any updates to CCS 4.2 that I should be aware of that would fix this problem?

  • 0 in reply to Bob Buksa
    TI__Guru*** 125430 points

    Bob Buksa said:
    I also tried to force them to be set with I2C_RSET and that did not work either.

    Does the code actually function as you expect (i.e. ignoring the register view)?  In order to confirm an issue related to CCS register view an easy test would be the following:

    1. Open a memory window.
    2. Configure for "I/O space" since you're looking at peripheral registers.
    3. Type in 0x3C00 as the address to view.  This is the base address for the I2C registers.
    4. Compare the following registers in the memory view with the values in the register view:
      1. I2CCLKL (0x3C03)
      2. I2CCLKH (0x3C04)
      3. I2CPSC (0x3C0C)

    Please let us know the result and the current status.  I see you verified my previous post as the answer which generally means your issue is resolved, though I didn't get that impression from the last post.

  • 0 in reply to Brad Griffis
    TI__Guru*** 125430 points

    I've been working with Bob on the phone and I believe we have this all sorted out now.  Here's a summary:

    • The thread I mentioned before actually isn't relevant here because that thread pertains to I2C_setup rather than I2C_config.  The I2C_config function actually configures the register in an order such that PSC, CLKL and CLKH are all written before I2CMDR which is where the IRS bit resides.  So in this case the order is correctly handled.
    • The real issue here was incorrect SYSCLK2 configuration.  BIOS 4.90 didn't touch SYSCLK2 at all, but BIOS 5.41 will actually configure this clock.  However, as part of the tcf conversion process they ended up with a bad value to program into the PLLDIV2 register.  The resulting SYSCLK2 was way too fast.
    • Because SYSCLK2 was way too fast none of the I2C registers could be read/written properly.  A simple test is to look at a couple of read-only I2C registers located at I/O addresses 0x3C0D and 0x3C0E.  These registers contain the values 0x0104 and 0x0005 respectively.  With the incorrectly configured SYSCLK2 the registers read back as 0x0000 but once properly configured they now read back as expected.

    Best regards,
    Brad