CCS/TMDSEVM6678: Fatal error detected in hyperlink

I found code that caused "Fatal error detected".
In hyplnkExampleIsr() in hyplnkIsr.c, the regs value from Hyplnk_readRegs() cannot be retrieved or the remainingInterrupts value is hyplnk_EXAMPLE_ISRNUM_FATAL, and a FATAL ERROR is displayed.
Also, looking at the log, if it is connected to the EVM of the other side after "Waiting for other side to come up", the same log is output repeatedly twice and Fatal error is output.
This is what hyplnk seems to be running on two cores.

[C66xx_0] Enable Master Core-0
Version #: 0x02010008; string HYPLNK LLD Revision: 02.01.00.08:Oct 26 2020:13:53:37
About to do system setup (PLL, PSC, and DDR)
Power domain is already enabled.  You probably re-ran without device reset (which is OK)
Constructed SERDES configs: PLL=0x00000228; RX=0x0046c495; TX=0x000ccf95
system setup worked
About to set up HyperLink Peripheral
============================Hyperlink Testing Port 0 
========================================== begin registers before initialization ===========
Revision register contents:
  Raw    = 0x4e901900
Status register contents:
  Raw        = 0x00000004
Link status register contents:
  Raw       = 0x00000000
Control register contents:
  Raw             = 0x00000000
Control register contents:
  Raw        = 0x00000000
============== end registers before initialization ===========
Waiting for other side to come up (       0)
SERDES_STS (32 bits) contents: 0x03478e1d; lock = 1
Waiting for other side to come up (       1)
Waiting for other side to come up (       2)
Waiting for other side to come up (       3)
Waiting for other side to come up (       4)
Waiting for other side to come up (       5)
Waiting for other side to come up (       6)
Waiting for other side to come up (       7)
Waiting for other side to come up (       8)
Waiting for other side to come up (       9)
Waiting for other side to come up (      10)
Waiting for other side to come up (      11)
Waiting for other side to come up (      12)
Waiting for other side to come up (      13)
Waiting for other side to come up (      14)
Waiting for other side to come up (      15)
Waiting for other side to come up (      16)
Waiting for other side to come up (      17)
Waiting for other side to come up (      18)
Waiting for other side to come up (      19)
Waiting for other side to come up (      20)
Waiting for other side to come up (      21)
Waiting for other side to come up (      22)
Waiting for other side to come up (      23)
Waiting for other side to come up (      24)
Waiting for other side to come up (      25)
Waiting for other side to come up (      26)
Waiting for other side to come up (      27)
Waiting for other side to come up (      28)
Waiting for other side to come up (      29)
Waiting for other side to come up (      30)
Waiting for other side to come up (      31)
Waiting for other side to come up (      32)
Waiting for other side to come up (      33)
Waiting for other side to come up (      34)
Waiting for other side to come up (      35)
Waiting for other side to come up (      36)
Waiting for other side to come up (      37)
Waiting for other side to come up (      38)
Waiting for other side to come up (      39)
Waiting for other side to come up (      40)
Waiting for other side to come up (      41)
Waiting for other side to come up (      42)
[hyplnkExamplePeriphSetup:1241] Enable remote communication
[hyplnkExamplePeriphSetup:1251] Get remote regs
[hyplnkExamplePeriphSetup:1251] Get remote regs
Fatal error detected
Local fatal isr status.lError = 1
Local fatal isr status.rError = 1
Local fatal isr ECCErrors.dblErrDet = 1

How do I make the hyplnk in C6678 run alone on a specific core?
In order to use all 8 cores in c6678 when using hyplnk function, should I run 8 cores in a different way instead of the code below?

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void EVM_init(void)
{
  platform_init_flags     init_flags;
  platform_init_config    init_config;
  uint32_t                core;

  if ( DNUM == 0u) {
    platform_uart_init();
    platform_uart_set_baudrate(115200);
    (void)platform_write_configure(PLATFORM_WRITE_PRINTF);

    memset(&init_flags, 0x00, sizeof(platform_init_config));
    memset(&init_config, 0x00, sizeof(platform_init_config));
    init_flags.ecc = 1;

    if (platform_init(&init_flags, &init_config) !=Platform_EOK) {
      printf("Platform failed to initialize, errno = 0x%x \n", platform_errno);
    }

    printf("Enable Master Core-%d\n",DNUM);


    DEVICE_REG32_W(DSCR_KICK0, DSCR_KICK0_KEY);
    DEVICE_REG32_W(DSCR_KICK1, DSCR_KICK1_KEY);

    for( core = 1u; core < 8u; core++) {
      DEVICE_REG32_W(BOOT_MAGIC_ADDR(core), (uint32_t)&_c_int00);
      platform_delay(1u);
    }

    for( core = 1u; core < 8u; core++) {
      DEVICE_REG32_W(IPCGR(core), 1);
      platform_delay(1000);
    }

  }
  MultiProc_setLocalId((uint16_t)CSL_chipReadDNUM());
}

int start_hyplnk(void); // 20201116 main() -> api by JC


int32_t main(void)
{
    platform_info p_info;

    uint16_t core_id;

    core_id = (uint16_t)CSL_chipReadDNUM();
    //System_printf("%d",core_id);

    Ipc_start();

    platform_get_info(&p_info);
    switch (core_id) {
        case 0:
            System_printf("0\n");
            platform_delay(1000* 1000);
            start_hyplnk();
            break;
        case 1:
            System_printf("1\n");
            break;
        case 2:
            System_printf("2\n");
            break;
        case 3:
            System_printf("3\n");
            break;
        case 4:
            System_printf("4\n");
            break;
        case 5:
            System_printf("5\n");
            break;
        case 6:
            System_printf("6\n");
            break;
        case 7:
            System_printf("7\n");
            break;
        default:
            break;
    }
    BIOS_start();
    return(0);
}


//int main(void)    // 20201116 orig blocked by JC
int start_hyplnk(void)  // 20201116 task by JC
{
    hyplnkRet_e retVal;
    uint32_t token;
    uint32_t i;
    int iteration = 0;
    hyplnkExampleDataBuffer_t *dataBufPtr;
#ifndef __ARMv7
    uint8_t mar;
    TSCL = 1;
#endif

#ifdef infraDMA  
    Qmss_Result localRegion,remoteRegion;
#endif

#if defined (SOC_C6678)
    CSL_BootCfgUnlockKicker();
#endif

    /*Initialize EDMA and InfraDMA handles*/
#ifdef EDMA
    EDMA3_DRV_Handle hEdma;
    hEdma = NULL;
#endif

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