Code Composer Studio forum - Recent Threads

F29H85X-MCAL-SDK: GPT-Interrupt Issue

Ananya N K — Wed, 14 Oct 2026 19:04:08 GMT

Part Number: F29H85X-MCAL-SDK

Hi, we have configured for Gpt Channel_0 (CPU Timer 0), for continuous mode for 10ms without OS ISR in EB Tresos. The interrupt is being generated only once.

PFA the configuration file fyr

GPT_V1.zip

#define APP_GPT_CH0_INT_ID (6U)

#define APP_INT_PRIORITY_DEFAULT (255U)

#define APP_INT_THRESHOLD (20U)

#define APP_PIPE_LINK_OWNER (2U)

/*********************************************************************************************************************

* Local Type Declarations

*********************************************************************************************************************/

MCAL_LIB_INT_ISR(Gpt_Ch0Isr);

uint32 Gpt_InterruptCnt[GPT_CFG_MAX_CHANNELS] = {0U};

static void App_RegisterInterrupt(uint32 InterruptId, uint32 Priority, uint32 IsrAddress)

{

uint32 int_config_addr = PIPE_BASE + PIPE_O_INT_CONFIG(InterruptId);

uint32 int_link_owner_addr = PIPE_BASE + PIPE_O_INT_LINK_OWNER(InterruptId);

HWREG(int_link_owner_addr) = (HWREG(int_link_owner_addr) & 0xF0U) | APP_PIPE_LINK_OWNER;

HWREG(PIPE_BASE + PIPE_O_INT_VECT_ADDR(InterruptId)) = IsrAddress;

HWREG(int_config_addr) = (HWREG(int_config_addr) & ~PIPE_INT_CONFIG_PRI_LEVEL_M) | Priority;

HWREG(PIPE_BASE + PIPE_O_INT_CTL_L(InterruptId)) = PIPE_INT_CTL_L_EN;

}

static void App_InitBareMetalInterrupts(void)

{

MCAL_LIB_DINT;

HWREG(PIPE_BASE + PIPE_O_GLOBAL_EN) = PIPE_GLOBAL_EN_KEY;

HWREG(PIPE_BASE + PIPE_O_MMR_CLR) = 0x3U;

HWREG(PIPE_BASE + PIPE_O_MEM_INIT) = PIPE_MEM_INIT_KEY | 0x3U;

while (HWREG(PIPE_BASE + PIPE_O_MEM_INIT_STS) != 0x2U)

{

}

HWREG(PIPE_BASE + PIPE_O_INTSP) = APP_PIPE_LINK_OWNER;

HWREG(PIPE_BASE + PIPE_O_RTINT_THRESHOLD) = APP_INT_THRESHOLD;

HWREG(PIPE_BASE + PIPE_O_INT_GRP_MASK) = 0x00U;

App_RegisterInterrupt(APP_GPT_CH0_INT_ID, APP_INT_PRIORITY_DEFAULT, (uint32)Gpt_Ch0Isr);

HWREG(PIPE_BASE + PIPE_O_GLOBAL_EN) = 0x3U | PIPE_GLOBAL_EN_KEY;

MCAL_LIB_EINT;

}

/*main function */

int main(void)

{

Mcu_Init(NULL_PTR);

#if (STD_ON == MCU_CFG_INIT_CLOCK_API)

Mcu_InitClock(McuConf_McuClockSettingConfig_McuClockSettingConfig_Osc2);

while ( MCU_PLL_LOCKED != Mcu_GetPllStatus() ) /* Get PLL status and check */

{

/* Wait until all enabled PLLs are locked */

}

#if(STD_OFF == MCU_CFG_NO_PLL)

Mcu_DistributePllClock();

#endif

Port_Init(NULL_PTR);

Gpt_Init(NULL_PTR);

App_InitBareMetalInterrupts();

/* Reset Counters */

Gpt_InterruptCnt[GPT_CHANNEL_0] = 0;

Dio_WriteChannel(DioConf_DioChannel_DioChannel_0, STD_LOW);

Gpt_EnableNotification(GPT_CHANNEL_0);

Gpt_StartTimer(GPT_CHANNEL_0, GPT_COUNT_VALUE_10MS);

Time_Delay(33);

while(1)

{

}

/* Time delay*/

int Time_Delay(float64 seconds)

{

McalLib_Delay(GPT_TIME_DELAY_PER_SECOND * seconds);

return 0;

}

/* GPT timer channel 0 notification function */

void Gpt_Notify_Func_0(void)

{

Gpt_InterruptCnt[GPT_CHANNEL_0]++;

Dio_FlipChannel(DioConf_DioChannel_DioChannel_0);

}

CCSTUDIO-THEIA: AI assistant base URL issue

Gildas ROLLAND — Wed, 14 Oct 2026 11:45:49 GMT

Part Number: CCSTUDIO-THEIA

Hi,

I want to use AI assistant with codex inside CCS 21.0.1

For security reasons, the IT department has blocked direct access to chatGPT and I have to use an intermediate provider.
I configured this in Base URL field of AI assistant settings like this

but I get the following answer

IT department have checked traffic logs from my PC and all my requests are directed to chatGPT and not to our provider as if the Base URL configuration has no effect.
For a test purpose IT have temporarily allowed access to chatGPT and I get valid answer with still the same config in CCS, so this confirm that my requests are sent to chatGPT and not to our provider.

To be sure I also do a test in windows terminal with the following command :

curl.exe -H "Authorization: Bearer **********************" -H "Content-Type: application/json" https://oai-t-foundry-agentai.openai.azure.com/openai/v1/responses -d "{\"model\":\"gpt-5.3-codex\",\"input\":\"hello\"}"

and I get valid answer, so my access to our provider is well working and the issue is only with CCS.

I have a similar issue with claude and I'm also not able to use it

Do you have solution to allow me to use codex?

Regards

RE: CCSTUDIO-THEIA: AI assistant base URL issue

Ki — Wed, 14 Oct 2026 17:12:08 GMT

If you open the config.toml file in an editor, do you see the base URL properly specified in there?

If you have VS Code, does the Codex extension in there work as expected?

RE: AM3358: CCS 12 working with JTAG probe XDS200 to trace U-boot and vmlinux based on AM335 SDK

Vinuchandran A V — Wed, 14 Oct 2026 17:11:55 GMT

Hi Kal,

Thanks for sharing the information.

We also face the same CCS crashing issue on our side.

I'll let you know once I find a fix. Please expect some delay.

Regards,
Vinu

AM3358: CCS 12 working with JTAG probe XDS200 to trace U-boot and vmlinux based on AM335 SDK

Kaloyan Dimitrov — Mon, 21 Sep 2026 17:26:26 GMT

Part Number: AM3358

Hi guys,

I am using Ubuntu 22.04.5 LTS, XDS200 as a JTAG probe and

SDK:

https://software-dl.ti.com/processor-sw/esd/PROCESSOR-SDK-LINUX-AM335X/02_00_02_11/exports/ti-processor-sdk-linux-am335x-evm-02.00.02.11-Linux-x86-Install.bin

CCS:

https://dr-download.ti.com/software-development/ide-configuration-compiler-or-debugger/MD-J1VdearkvK/12.1.0/CCS12.1.0.00007_linux-x64.tar.gz

With the ones above attached and installed on my build machine I am trying to trace U-boot and the Linux kernel available from the SDK but I am stumbling into those issues:

I) When I try to Load symbols or Load program from the CCS using the cross-compiled vmlinux ~ 90MB the IDE just terminates execution - here are 2 screenshots on what I am seeing before the CCS closes:

Those are the versions of the IDE that I use, my target configuration and the XDS200 test connection output:

XDS200-Test-Connection.txt

Is there some extra configuration that I may be missing, sould I use other version of the CCS for that task etc - how can I address the issue so that I can load the kernel compiled with debug info and hit a hardware breakpoint when it starts?

II) My second issue is with the U-boot code I try to load u-boot.bin and u-boot with the proper U-boot reallocation address so that I will be able to run the code and trace it hitting hardware breakpoints unfortunatelly I am not able to run the bootloader - this is what I do, step-by-step, please correct me if I am doing something worng or I am missing something.

1) Using a BeagleBone Black as an evaluation board I reset the board and I stop in the U-boot booting from SD card on which I have copied the bootloader that I have manually cross-compiled fro from the code in the SDK - U-Boot SPL 2025.01-ga44465cad8a3using and, from the U-boot's command line I verify the loader offset - 0x9ff5f000

2) I load the and execute the SPL - I am able to hit hardware breakpoints and when I run and resume execution I reach this point in its execution:

U-Boot SPL 2025.01-ga44465cad8a3 (Sep 17 2026 - 17:14:14 -0400)
SPL: failed to boot from all boot devices

### ERROR ### Please RESET the board ###

3) At that point I try to load the u-boot.bin and then the symbols from u-boot passing the acquired u-boot reallocation offset so that I can try and hit a HW breakpoint when it runs, but I am not able to run the u-boot code I always stay in the hang() function see the attached screenshots - what is the proper sequence to run successfully and hit HW breakpoints in U-boot - I am doing something wrong, missing a step, using the wrong code(binary, debug symbols ) etc

Here are couple of screenshots of CCS when u-boot.bin is loaded:

Screenshot when resume execution with U-boot loaded:

Screenshot with U-boot suspended:

What is the proper sequence of setting up the Beaglebone Black(reset and stop in u-boot or maybe something else), load and execute SPL, load U-boot binary and binary with debug symbols setting up it's propper reallocation addres loading the PC with the right start address and run it so that it excutes and one is able to trace it using the XDS200 JTAG probe hitting HW breakpoints when the bootlaoder is running ?

RE: AM3358: CCS 12 working with JTAG probe XDS200 to trace U-boot and vmlinux based on AM335 SDK

Kaloyan Dimitrov — Wed, 14 Oct 2026 15:19:10 GMT

Hi Vinu,

I am looking forward to your pointers, so that we can solve the kernel debugging issue.

Just a little bit of extra info I am able to load the vmlinux with gdb and analyse it with addr2line, so it is not a broken artifact and debug data is included in it.

The size of kernel zImage that I use for booting my system is 5.2M and its corresponding vmlinux with debug symbols included is 87M. CCS 12 is consistently terminating when I try to load the vmlinux and stops being responsive at the 60% mark so roughly when 52M are being transferred.

Regards,

Kal

RE: MSPM0-SDK: Uniflash (9.7.0.5873) advertise XDS100V2 connection,

Ki — Tue, 13 Oct 2026 18:06:59 GMT

Hi Patrick,

I filed a ticket for this. Tracking link: https://sir.ext.ti.com/jira/browse/EXT_EP-13697

Thanks

MSPM0-SDK: Uniflash (9.7.0.5873) advertise XDS100V2 connection,

Patrick Ruf — Tue, 13 Oct 2026 13:09:43 GMT

Part Number: MSPM0-SDK

Hi,

Enhancement request:

When I choose the MSPM0C1104 target device, I'm also able to choose the XDS100V2 (and V3) as the connection although this is not possible as XDS100V2 (and V3) does not support SWD protocol.
This is misleading and should be corrected in a future release.

Best regards,
Patrick

TMS320F280039: Cannot build the TIDA-010087 in CCS20.5

Leo Wu — Tue, 13 Oct 2026 03:58:01 GMT

Part Number: TMS320F280039

Hi experts,

I meet the issue when building the TIDA-010087 in CCS20.5

The same projetc is build OK in the CCS12.8.1

Version Info:

IDE: CCS20.5/CCS12.8.1

SDK: C2000Ware_DigitalPower_SDK_5_06_00_00

Project: bt2ph_nonpowerSUITE_F28003x

Any suggestions for this issue?

Thanks

RE: TMS320F280039: Cannot build the TIDA-010087 in CCS20.5

Ira Thete — Tue, 13 Oct 2026 05:50:41 GMT

Hi Leo,

Can you try with the latest Digital Power SDK? i.e. version 26.01.00.00

Thanks,

Ira

TMS570LC4357: Clarification on the Usage of ARM Compiler TI ARM Optimizing C/C++ Compiler v20.2.7.LTS

Rahul V — Fri, 18 Sep 2026 07:07:32 GMT

Part Number: TMS570LC4357

This is regarding the intended use of TI ARM Optimizing C/C++ Compiler v20.2.7.LTS.

We have a few queries related to the procurement, usage, and safety-related support for this compiler. We would appreciate your clarification on the following points:

Licensing and Procurement
- Is the TI ARM Optimizing C/C++ Compiler v20.2.7.LTS, a licensed product that requires purchase?
- If so we would like to know the available licensing options, commercial details, and the process for procurement.
- If not, how to procure the particular version of the compiler?
IDE Compatibility
- Is the compiler version TI ARM Optimizing C/C++ Compiler v20.2.7.LTS, restricted to use only with Code Composer Studio only, or can it also be integrated and used with other IDEs and development environments?
Safety and Compliance Support
- Does TI provide safety-related documentation to support the use of this compiler in SIL/ASIL compliant projects?
- Specifically, we would like to know the availability of documents such as:
  - Tool Qualification Report / Tool Qualification Kit
  - Safety Manual
  - Published Errata and Known Issues etc
Additional Safety-Related Information
- Are there any additional safety-related documents, recommendations, restrictions, or best practices that should be considered when using this compiler in a safety-critical application, particularly for SIL/ASIL-compliant developments?

We look forward to your response and any relevant documentation that can support the safety assessment and qualification activities of our project.

RE: TMS570LC4357: Clarification on the Usage of ARM Compiler TI ARM Optimizing C/C++ Compiler v20.2.7.LTS

jagadish gundavarapu — Mon, 12 Oct 2026 09:04:29 GMT

Hi Rahul,

The SW process of HALCOGEN was certified. The code generated by HAL is not certified.

The HALCoGen Compliance Support Package (CSP) was developed to provide the necessary documentation, reports and unit test capability to assist customers using HALCoGen generated software to comply with functional safety standards such as IEC 61508 and ISO 26262.

--
Thanks & regards,
Jagadish.

RE: TMS570LC4357: Clarification on the Usage of ARM Compiler TI ARM Optimizing C/C++ Compiler v20.2.7.LTS

Rahul V — Mon, 12 Oct 2026 07:38:38 GMT

Hi Jagadish,

Thank you for the reply from your end. Our Team is analyzing the response.

We have an additional query in between, Pls consider this also,

5. We are using Halcogen tool for generating the firmware drivers. Can the generated drivers be considered as Safety compliant?

We can see the following disclaimer details in the generated code. Please see the below, which provide no guarantee for the code generated by the tool,

/** @file HL_esm.c
*   @brief Esm Driver Source File
*   @date 11-Dec-2018
*   @version 04.07.01
*
*   This file contains:
*   - API Functions
*   .
*   which are relevant for the Esm driver.
*/

/*
* Copyright (C) 2009-2018 Texas Instruments Incorporated - www.ti.com
*
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
*    Redistributions of source code must retain the above copyright
*    notice, this list of conditions and the following disclaimer.
*
*    Redistributions in binary form must reproduce the above copyright
*    notice, this list of conditions and the following disclaimer in the
*    documentation and/or other materials provided with the
*    distribution.
*
*    Neither the name of Texas Instruments Incorporated nor the names of
*    its contributors may be used to endorse or promote products derived
*    from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/

RE: UNIFLASH: UniFlash DSLite.exe hangs while loading DeviceIdentifier.dll under Citrix Windows 11 – DMP analysis request

TingWei Hsueh — Mon, 12 Oct 2026 05:30:42 GMT

Hi Ricky,

Thank you for following up.

The issue has been resolved. Before reinstalling, we disabled the antivirus software and used the fsclean command to clear the related cached data.

After completing these steps, both CCS and UniFlash can now run successfully inside Citrix and connect to the XDS200 on the local machine.

Thank you for your assistance.

Best regards,

TingWei

UNIFLASH: UniFlash DSLite.exe hangs while loading DeviceIdentifier.dll under Citrix Windows 11 – DMP analysis request

TingWei Hsueh — Tue, 22 Sep 2026 02:09:05 GMT

Part Number: UNIFLASH

Dear TI Support,

We are investigating an issue where UniFlash DSLite.exe hangs at “Connecting…” when running in a Citrix Windows 11 environment.

Citrix Advanced Support and our preliminary WinDbg analysis found that the active worker thread was blocked in the following call path:DSLite.zip , Execute command and record.txt

ntdll!NtCreateSection
ntdll!LdrpMapDllNtFileName
ntdll!LdrpMapDllSearchPath
ntdll!LdrpLoadDllInternal
ntdll!LdrLoadDll
KERNELBASE!LoadLibraryExW
KERNELBASE!LoadLibraryA
ctools!SetDebugProperty
ctools!Ti::Sds::Ctools::JobMgr::GetDeviceIdentifier
ctools!Ti::Sds::Ctools::JobMgr::AddTarget
DebugServer
DSLite.exe

The loader data stored in the dump confirms that the module being loaded was:

DeviceIdentifier.DLL

The expected DLL path is:

C:\ti\uniflash_9.6.0\deskdb\content\TICloudAgent\win\

ccs_base\emulation\analysis\bin\DeviceIdentifier.DLL

At the time of the dump, Windows had already obtained a file handle with Read/Execute access and was blocked while creating an executable image section through NtCreateSection.

Environment:
Citrix 2603
Windows 11
UniFlash 9.6.0
UniFlash-bundled DSLite version: 21.0.0.4106
DebugServer version: 21.0.0.4106
TI Emulation Package/CTools product version: 21.0.0.3955
TI XDS200 USB Debug Probe
Target device: MSPM0G3519

DSLite.exe executed from an Administrator command prompt
Antivirus software removed/disabled during the comparison
Citrix user-mode hooks for DSLite.exe excluded

Could TI please help analyze the attached DMP using TI private symbols?

The captured call stack shows that DSLite stopped while loading:

DeviceIdentifier.DLL

The key addresses are:

ctools!SetDebugProperty+0x1656
ctools!SetDebugProperty+0x11b1
ctools!Ti::Sds::Ctools::JobMgr::GetDeviceIdentifier+0xe7
ntdll!NtCreateSection+0x14

Could TI please help confirm:

What operation was DSLite performing at these addresses?
Is the hang related to DeviceIdentifier.dll, or is it waiting for another TI component or Windows operation?
Is there any known issue or recommended workaround for running UniFlash/DSLite in a Citrix Windows environment?

Thank you for your assistance.

RE: AM3358: CCS 12 working with JTAG probe XDS200 to trace U-boot and vmlinux based on AM335 SDK

Vinuchandran A V — Mon, 12 Oct 2026 05:22:30 GMT

Hi Kal,

Sorry to hear about the DAP trouble. Hardware damage from CCS usage is very unlikely.

Let me check about the kernel part and will get back to you in 3 days.

Regards,
Vinu

RE: UNIFLASH: UniFlash DSLite.exe hangs while loading DeviceIdentifier.dll under Citrix Windows 11 – DMP analysis request

Ricky Lau — Mon, 12 Oct 2026 03:43:40 GMT

Hi TingWei,

I'm very sorry for the late reply.

Can you confirm that you are still seeing this issue?

DeviceIdentifier.dll is a binary that is part of the DSLite and UniFlash application. We are looking through the source to see if there is anything that might cause it to fail to load the library in your Citrix environment.

Thank you,

Ricky

RE: AM3358: CCS 12 working with JTAG probe XDS200 to trace U-boot and vmlinux based on AM335 SDK

Kaloyan Dimitrov — Fri, 09 Oct 2026 15:10:00 GMT

Hi Vinu,

That's great news - I will try your suggestion yesterday and early morning today I am getting JTAG failures to connect to the DAP(I really hope I haven't damaged the XDS200 probe while testing), so I wasn't able to follow through at least for time being.

What about the kernel part of the question:

Trying to load in memory the vmlinux and hit HW breakpoints when the kernel is booting - my particular error is as mentioned above:

CortexA8: Loader: One or more sections of your program falls into a memory region that is not writable. These regions will not actually be written to the target. Check your linker configuration and/or memory map.

Regards,

Kal

RE: LM72XXX-DESIGN-CALC: Does TI Cloud Agent transmit data to external servers?

MartinS — Fri, 09 Oct 2026 14:15:05 GMT

TI Cloud Agent is an application that is installed locally on end users PC. Its main purpose is to enable access to LaunchPad's/EVMs that are connected to end user's PC(i.e. allow access to USB or Serial connections of host PC).

When using a browser to access services on dev.ti.com, the browser will pull application necessary html/javascript files from dev.ti.com. It will also launch locally installed TI Cloud Agent to initiate data connection to LaunchPad or EVM. The actual data, firmware, other data exchange happens locally on the end users PC between local TI Cloud Agent and browser. This local data communication between TI Cloud Agent and browser is not tracked or sent to TI. The application html/javascript pulled from dev.ti.com will collect typical web based analytics information according to TI data collection policies.

The only additional communication that TI Cloud Agent performs with dev.ti.com is version update checks (to offer installation of newer version) and download of specific device family device support files. e.g. if a GUI Composer app or Cloud IDE is used with MSPM0L1306 LaunchPad then MSPM0 device family device support package will be downloaded. This happens first time an application is used OR if an update is available for that device support package.

Offline products

TI Cloud Agent component is also used in offline products that are installed locally on the PC. e.g. if a GUI Composer application (as available on dev.ti.com/gallery) or CCStudio product is installed through their installer. It is a common data exchange link. In this case there is no communication between TI Cloud Agent and ti.com server's. The end product installer/update checker manages TI Cloud Agent, device support or updates.

Martin

LM72XXX-DESIGN-CALC: Does TI Cloud Agent transmit data to external servers?

yamashita hiroto — Thu, 08 Oct 2026 05:08:16 GMT

Part Number: LM72XXX-DESIGN-CALC

Hello,

We are evaluating TI Cloud Agent for use in our corporate environment.

According to the TI documentation, TI Cloud Agent is not a cloud-based application and runs locally on the user's machine.

However, before deploying the software, we would like to understand its network communication behavior.

Could you please clarify the following?

1. Does TI Cloud Agent send any data to Texas Instruments servers or any external cloud services during normal operation?

2. If network communication occurs, what information is transmitted (e.g. device information, firmware images, logs, telemetry, user data)?

3. Is there any official document describing the network communication and data handling behavior of TI Cloud Agent?

This information is required for our internal security review and cloud-service approval process.

Thank you for your support.

RE: AM3358: CCS 12 working with JTAG probe XDS200 to trace U-boot and vmlinux based on AM335 SDK

Vinuchandran A V — Fri, 09 Oct 2026 05:14:39 GMT

Hi Kal,

We have tried the steps mentioned on an AM437x EVM and could load Uboot through CCS. (It has XDS100v2, not XDS200, though)

e2e.ti.com/.../Untitled-design.mp4

Sharing the video showing the steps for your reference.

Regards,
Vinu

RE: AM3358: CCS 12 working with JTAG probe XDS200 to trace U-boot and vmlinux based on AM335 SDK

Vinuchandran A V — Thu, 08 Oct 2026 07:59:55 GMT

Hi Kal,

The steps to load Uboot through CCS is given in the Processor SDK doc.

It is tested on AM437x and which is similar to AM335x and not tested recently.

But please go through this.

https://software-dl.ti.com/processor-sdk-linux/esd/AM335X/11_02_05_02/exports/docs/linux/Foundational_Components/U-Boot/Apps-Load-in-CCS.html

There might be some steps you are missing. For example, the Uboot, should be built with "CONFIG_OF_EMBED=y" (and CONFIG_OF_SEPARATE is not set).

But your config file has CONFIG_OF_SEPARATE=y and # CONFIG_OF_EMBED is not set, so the u-boot ELF carries no DTB. That matches your hang() ← board_init_f() stack. Switching to OF_EMBED should fix (only) that part.

Please try this out and let me know.

Regards,
Vinu

RE: TMS570LS0332: Guadiance for making SIL3 Device using TMS570LS0332 controller

jagadish gundavarapu — Thu, 08 Oct 2026 04:54:03 GMT

Hi Tarunraj,

An external watchdog is not automatically mandatory for SIL3 compliance — but whether you need one depends on your architectural constraints analysis, diagnostic coverage calculations, and common-cause failure (CCF) considerations.

An external watchdog may be necessary or strongly recommended in these cases:

a) Common-Cause Failure (CCF) Mitigation

The internal watchdog shares the same silicon, power supply, and package as the CPU
A catastrophic failure (e.g., latch-up, overvoltage, EMI event) could disable both the CPU and the internal watchdog simultaneously
An external watchdog (separate IC, separate power domain) provides independence and protects against these common-cause failures
IEC 61508 requires analysis of CCF — if your analysis shows unacceptable risk, an external watchdog is the standard mitigation

b) Architectural Constraints per IEC 61508-2 Annex B

IEC 61508-2 defines Hardware Fault Tolerance (HFT) requirements based on the Safe Failure Fraction (SFF)

If your FMEDA shows that the internal watchdog alone does not provide sufficient diagnostic coverage to reach SFF ≥ 60% (for HFT=1) or ≥ 90% (for HFT=0), you may need an external watchdog to improve your SFF
The external watchdog adds diagnostic coverage for faults that the internal watchdog cannot detect (e.g., CPU running but stuck in a loop that still services the watchdog correctly)

c) Assessor or Standard Requirements

Some industry-specific standards (e.g., ISO 26262 for automotive, IEC 62061 for machinery) or your TÜV assessor may have a presumption that an external watchdog is required for SIL3
Even if not strictly required by the math, it is often considered good practice and may simplify certification

d) Program Flow Monitoring

An external watchdog can be configured to require a specific sequence of toggles or a question-answer protocol (e.g., the watchdog sends a challenge, the CPU must respond with the correct answer)
This provides program flow monitoring — detecting if the CPU is executing the wrong code path, even if it's still running and servicing a simple timeout watchdog
The internal WWDT provides some of this (windowed servicing), but an external watchdog with a challenge-response protocol is stronger

So, its al depends on your system level analysis.

--
Thanks & regards,
Jagadish.

TMS570LS0332: Guadiance for making SIL3 Device using TMS570LS0332 controller

Tarunraj Paddiyar — Fri, 18 Sep 2026 10:34:54 GMT

Part Number: TMS570LS0332

Hello everyone,

I am planning to develop a SIL3-compliant device using the TI TMS570LS0332 controller. I have gone through the available documentation and the TÜV certificate, but I still have a few doubts regarding the controller and the correct development approach. I would really appreciate some guidance from people who have worked with the Hercules/TMS570 family in safety-related applications.

TÜV certification and SIL3 compliance

I have seen the TÜV certificate/documentation which states that the controller is suitable/certified for SIL3 applications. However, I could not find "SIL3 compliant" explicitly mentioned in the datasheet itself.

Does the TÜV certificate mean that the controller can be used as part of a SIL3 safety-related system? If so, why is this not mentioned directly in the datasheet? Also, what exactly is covered by the controller's SIL3 certification, and what additional requirements would I need to fulfil at the system level to achieve SIL3?

Do we need two controllers for SIL3?

My understanding is that for SIL3 applications, two controllers may be used with the same software/code and their outputs are compared or monitored. If there is a mismatch, a fault is detected and the system goes into a safe state.

If this architecture is required, do both controllers need to be programmed separately? Or is there any mechanism by which programming one controller automatically programs the other?

Also, is there any specific procedure for programming the Hercules/TMS570 controllers, or can they be programmed in the same way as other TI controllers using the normal JTAG/debug/programming interface?

Software development and programming approach

I understand that I can use HALCoGen to generate the initial configuration/code and then develop the application in Code Composer Studio (CCS).

However, I would like to understand if there are any specific programming practices that need to be followed for a SIL3 application using the TMS570. For example:

Coding rules or restrictions
Functions or programming practices that should be avoided
How faults and diagnostic checks should be handled
Use of watchdogs, ECC, CPU self-tests, etc.
Whether there are any specific requirements for memory, interrupts, communication, or peripheral handling
Any recommended coding standard such as MISRA-C
How the software should be structured so that it can eventually go through SIL3 verification/assessment

Basically, I would like to understand the difference between simply developing an application on the TMS570 and developing it in a way that can actually be taken through a SIL3 certification process.

Development board

For the development phase, I am planning to order the LAUNCHXL-TMS57004.

Is this development board suitable for getting started with the TMS570/Hercules family and developing the type of application I have in mind? Are there any major limitations of this board compared with the TMS570LS0332 that I should be aware of?

If there are any other development boards, tools, application notes, safety manuals, or example projects that you would recommend for someone starting a SIL3 project with the TMS570LS0332, please let me know.

Thanks in advance for your help.

RE: AM3358: CCS 12 working with JTAG probe XDS200 to trace U-boot and vmlinux based on AM335 SDK

Kaloyan Dimitrov — Wed, 07 Oct 2026 16:32:10 GMT

Hi Vinu,

Sure, here it goes:

I created a project for U-boot in CCS and added the source code from /ti-processor-sdk-linux-am335x-evm-11.02.05.02/board-support/ti-u-boot-2025.01+git to it you can see the results in screenshots above also
Then I added the toolchain in the PATH - my most recent tests were done using gcc-arm-10.3-2021.07-x86_64-arm-none-linux-gnueabihf from ARM
1. Download URL: https://developer.arm.com/-/media/Files/downloads/gnu-a/10.3-2021.07/binrel/gcc-arm-10.3-2021.07-x86_64-arm-none-linux-gnueabihf.tar.xz
Added Make Build Targets to the U-Boot project for cross-compiling
1. Defconfig
2. U-boot
3. SPL
Then I just build the targets and the resulting artifacts I used for my testing.
1. SPL: u-boot-spl, u-boot-spl.bin
2. U-boot: u-boot, u-boot.bin
The latest .config file that I am working with is: e2e.ti.com/.../CONFIG

I also have those steps performed outside of CCS as part of a build script and using different toolchains.

And a small disclaimer on my end - I am testing a number of things so .config may have some unnecessary entries added - I will follow-up on that if needed.

If any clarifications are needed on my end I will do my best to promptly answer.

Thanks,

Kal