Code Composer Studio forum - Recent Threads

CCSTUDIO-THEIA: How can I export raw data from TI (Texas Instruments) as 16-bit values in CCS version 21.0?

Andrew Kong — Thu, 15 Oct 2026 06:59:16 GMT

Part Number: CCSTUDIO-THEIA

CCS v12.2 — Memory export settings

CCS v12.2 — Exported memory data
CCS v21.0 — Memory export settings

Exported data with 16-bit byte swapping enabled

Exported data with byte swapping disabled

In CCS v12.2, I can select a 16-bit data width when exporting memory data from the Debug view.

In CCS v21.0, I can’t find an option to set the data width to 16 bits; it defaults to 8 bits. How can I configure CCS v21.0 to export memory data the same way as CCS v12.2—with a 16-bit width and Swap Bytes disabled?

RE: CCSTUDIO-THEIA: How can I export raw data from TI (Texas Instruments) as 16-bit values in CCS version 21.0?

Andrew Kong — Sat, 17 Oct 2026 05:34:26 GMT

The data exported in this format matches the contents of flash byte for byte.

I’m implementing a bootloader, and the bootloader host software supports only the TI RAW DATA (16-bit, not swapped) format. When a BIN file is exported in this format, its contents match the data stored in flash. Files exported in other formats differ from the flash contents, causing the bootloader operation to fail.

Is there other way to export the flash bin? The data must matches the contents of flash byte for byte

RE: CCSTUDIO-THEIA: AI assistant base URL issue

Gildas ROLLAND — Fri, 16 Oct 2026 13:24:58 GMT

Thanks, I will check this with my IT department

CCSTUDIO-THEIA: AI assistant base URL issue

Gildas ROLLAND — Wed, 14 Oct 2026 11:45:49 GMT

Part Number: CCSTUDIO-THEIA

Hi,

I want to use AI assistant with codex inside CCS 21.0.1

For security reasons, the IT department has blocked direct access to chatGPT and I have to use an intermediate provider.
I configured this in Base URL field of AI assistant settings like this

but I get the following answer

IT department have checked traffic logs from my PC and all my requests are directed to chatGPT and not to our provider as if the Base URL configuration has no effect.
For a test purpose IT have temporarily allowed access to chatGPT and I get valid answer with still the same config in CCS, so this confirm that my requests are sent to chatGPT and not to our provider.

To be sure I also do a test in windows terminal with the following command :

curl.exe -H "Authorization: Bearer **********************" -H "Content-Type: application/json" https://oai-t-foundry-agentai.openai.azure.com/openai/v1/responses -d "{\"model\":\"gpt-5.3-codex\",\"input\":\"hello\"}"

and I get valid answer, so my access to our provider is well working and the issue is only with CCS.

I have a similar issue with claude and I'm also not able to use it

Do you have solution to allow me to use codex?

Regards

RE: CCSTUDIO-THEIA: AI assistant base URL issue

Ki — Fri, 16 Oct 2026 13:10:25 GMT

[quote userid="290290" url="~/support/tools/code-composer-studio-group/ccs/f/code-composer-studio-forum/1689567/ccstudio-theia-ai-assistant-base-url-issue/6513210"]In VS Code, "github copilot chat" is working, but this extension is not accessible in code composer.[/quote]

Yes, this is a known issue. See the copilot section of: https://software-dl.ti.com/ccs/esd/documents/application_notes/appnote-ccs_ai_code_assistant.html

And also: https://software-dl.ti.com/ccs/esd/documents/application_notes/appnote-ccs_ai_litellm_copilot.html

[quote userid="290290" url="~/support/tools/code-composer-studio-group/ccs/f/code-composer-studio-forum/1689567/ccstudio-theia-ai-assistant-base-url-issue/6513210"]Do you have any idea to use codex or claude in code composer with intermediate provider[/quote]

I have had good success with OpenRouter: https://software-dl.ti.com/ccs/esd/documents/application_notes/appnote-ccs_ai_openrouter.html

Thanks

RE: CCSTUDIO-THEIA: AI assistant base URL issue

Gildas ROLLAND — Fri, 16 Oct 2026 12:22:56 GMT

In VS Code, "github copilot chat" is working, but this extension is not accessible in code composer.

Do you have any idea to use codex or claude in code composer with intermediate provider, without any access to openai or anthropic servers?

RE: AM3358: CCS 12 working with JTAG probe XDS200 to trace U-boot and vmlinux based on AM335 SDK

Vinuchandran A V — Fri, 16 Oct 2026 11:31:46 GMT

Hi Kal,

We were able to get the Linux part working.

[quote userid="718910" url="~/support/tools/code-composer-studio-group/ccs/f/code-composer-studio-forum/1684114/am3358-ccs-12-working-with-jtag-probe-xds200-to-trace-u-boot-and-vmlinux-based-on-am335-sdk/6506575"]

CortexA8: Loader: One or more sections of your program falls into a memory region that is not writable. These regions will not actually be written to the target. Check your linker configuration and/or memory map.

[/quote]

That loader message is expected. vmlinux is linked at virtual addresses (0xC0xxxxxx), which aren’t in the target’s writable memory map, so Load Program can’t be used on it. Use the ELF for symbols only and let U-Boot put the kernel in RAM:

The following steps need to be followed

Build zImage, the DTB and vmlinux from the same tree and .config, with CONFIG_DEBUG_KERNEL, CONFIG_DEBUG_INFO, CONFIG_DEBUG_INFO_DWARF4 and CONFIG_AUTO_ZRELADDR enabled, and CONFIG_DEBUG_INFO_REDUCED is not set
Boot to the U-Boot prompt (bootloaders in SD card) and load the zImage and DTB into RAM. Do not boot yet.
Attach CCS to the Cortex-A8. This halts the CPU, so the U-Boot prompt stops responding, which is expected. Don’t reset the board, since that wipes the RAM you just loaded. Don’t change any registers either.
Use Run > Load > Load Symbols on vmlinux, with both offsets left empty. Do not use Load Program.
Add a hardware breakpoint on start_kernel.
Resume the target, then run bootz <zImage addr> - <dtb addr> from the U-Boot console. The CPU halts at start_kernel, and you can step from there.

Please try this out.

Regards,
Vinu

AM3358: CCS 12 working with JTAG probe XDS200 to trace U-boot and vmlinux based on AM335 SDK

Kaloyan Dimitrov — Mon, 21 Sep 2026 17:26:26 GMT

Part Number: AM3358

Hi guys,

I am using Ubuntu 22.04.5 LTS, XDS200 as a JTAG probe and

SDK:

https://software-dl.ti.com/processor-sw/esd/PROCESSOR-SDK-LINUX-AM335X/02_00_02_11/exports/ti-processor-sdk-linux-am335x-evm-02.00.02.11-Linux-x86-Install.bin

CCS:

https://dr-download.ti.com/software-development/ide-configuration-compiler-or-debugger/MD-J1VdearkvK/12.1.0/CCS12.1.0.00007_linux-x64.tar.gz

With the ones above attached and installed on my build machine I am trying to trace U-boot and the Linux kernel available from the SDK but I am stumbling into those issues:

I) When I try to Load symbols or Load program from the CCS using the cross-compiled vmlinux ~ 90MB the IDE just terminates execution - here are 2 screenshots on what I am seeing before the CCS closes:

Those are the versions of the IDE that I use, my target configuration and the XDS200 test connection output:

XDS200-Test-Connection.txt

Is there some extra configuration that I may be missing, sould I use other version of the CCS for that task etc - how can I address the issue so that I can load the kernel compiled with debug info and hit a hardware breakpoint when it starts?

II) My second issue is with the U-boot code I try to load u-boot.bin and u-boot with the proper U-boot reallocation address so that I will be able to run the code and trace it hitting hardware breakpoints unfortunatelly I am not able to run the bootloader - this is what I do, step-by-step, please correct me if I am doing something worng or I am missing something.

1) Using a BeagleBone Black as an evaluation board I reset the board and I stop in the U-boot booting from SD card on which I have copied the bootloader that I have manually cross-compiled fro from the code in the SDK - U-Boot SPL 2025.01-ga44465cad8a3using and, from the U-boot's command line I verify the loader offset - 0x9ff5f000

2) I load the and execute the SPL - I am able to hit hardware breakpoints and when I run and resume execution I reach this point in its execution:

U-Boot SPL 2025.01-ga44465cad8a3 (Sep 17 2026 - 17:14:14 -0400)
SPL: failed to boot from all boot devices

### ERROR ### Please RESET the board ###

3) At that point I try to load the u-boot.bin and then the symbols from u-boot passing the acquired u-boot reallocation offset so that I can try and hit a HW breakpoint when it runs, but I am not able to run the u-boot code I always stay in the hang() function see the attached screenshots - what is the proper sequence to run successfully and hit HW breakpoints in U-boot - I am doing something wrong, missing a step, using the wrong code(binary, debug symbols ) etc

Here are couple of screenshots of CCS when u-boot.bin is loaded:

Screenshot when resume execution with U-boot loaded:

Screenshot with U-boot suspended:

What is the proper sequence of setting up the Beaglebone Black(reset and stop in u-boot or maybe something else), load and execute SPL, load U-boot binary and binary with debug symbols setting up it's propper reallocation addres loading the PC with the right start address and run it so that it excutes and one is able to trace it using the XDS200 JTAG probe hitting HW breakpoints when the bootlaoder is running ?

RE: CCSTUDIO-THEIA: AI assistant base URL issue

Gildas ROLLAND — Fri, 16 Oct 2026 06:26:48 GMT

It's something that I have alreay tested with same result.

I continued my investigation and it seems that even if prompt request are sent to the "base URL", VS code extension need access to chatGPT server to work correctly.

Thanks

AM4376: PHY Reset Not Working After Migration from Kernel 5.10.10 to Kernel 6.12

mahesh sutar — Thu, 15 Oct 2026 09:36:54 GMT

Part Number: AM4376

Hi Team,

We are facing an issue with PHY reset after migrating our platform from Linux Kernel 5.10.10 to Linux Kernel 6.12.After migration to Kernel 6.12, the PHY reset sequence is not functioning as expected.Due to this, the Ethernet PHY is not being properly initialized after /reset.

root@am437x-evm:~# ifconfig
eth0 Link encap:Ethernet HWaddr 90:06:F2:45:E7:CD
inet6 addr: fe80::9206:f2ff:fe45:e7cd/64 Scope:Link
UP BROADCAST RUNNING MULTICAST MTU:1500 Metric:1
RX packets:4 errors:0 dropped:0 overruns:0 frame:0
TX packets:6 errors:0 dropped:0 overruns:0 carrier:0
collisions:0 txqueuelen:1000
RX bytes:240 (240.0 B) TX bytes:516 (516.0 B)

eth1 Link encap:Ethernet HWaddr 5E:6A:53:2A:9C:61
UP BROADCAST MULTICAST MTU:1500 Metric:1
RX packets:0 errors:0 dropped:0 overruns:0 frame:0
TX packets:0 errors:0 dropped:0 overruns:0 carrier:0
collisions:0 txqueuelen:1000
RX bytes:0 (0.0 B) TX bytes:0 (0.0 B)

lo Link encap:Local Loopback
inet addr:127.0.0.1 Mask:255.0.0.0
inet6 addr: ::1/128 Scope:Host
UP LOOPBACK RUNNING MTU:65536 Metric:1
RX packets:6 errors:0 dropped:0 overruns:0 frame:0
TX packets:6 errors:0 dropped:0 overruns:0 carrier:0
collisions:0 txqueuelen:1000
RX bytes:300 (300.0 B) TX bytes:300 (300.0 B)

root@am437x-evm:~# phytool write eth0/0x0/0x1F 0x8000
error: phy_write (-95)
root@am437x-evm:~# phytool write eth1/0x1/0x1F 0x8000
error: phy_write (-95)
root@am437x-evm:~# phytool write eth0/0x0/0x1F 0x0000
error: phy_write (-95)
root@am437x-evm:~# ^C
root@am437x-evm:~# uname -a
Linux am437x-evm 6.12.49 #1 Mon Oct 12 11:40:34 IST 2026 armv7l GNU/Linux
root@am437x-evm:~# ^C
root@am437x-evm:~# Please see log

RE: AM4376: PHY Reset Not Working After Migration from Kernel 5.10.10 to Kernel 6.12

mahesh sutar — Fri, 16 Oct 2026 05:49:30 GMT

We are using pru

Please see above details

RE: AM4376: PHY Reset Not Working After Migration from Kernel 5.10.10 to Kernel 6.12

Schuyler Patton — Fri, 16 Oct 2026 04:57:27 GMT

Hi,

Apologies, I am not seeing the log. Which interfaces are you using the CPSW or the PRU interfaces?

Best Regards,

Schuyler

RE: XDS110ISO-EVM: Request for Replacement of Faulty XDS110 Debug Probe

Shaunak Deshpande — Fri, 16 Oct 2026 03:55:41 GMT

Meanwhile,

you can also checkout similar threads to see if they resolve your issue:

XDS110ISO-EVM: Unable to program my MSPM0C1104 in my PCB with either the XDS110-ET present on the Launchpad or with the XDS110 - DACE1 Probe.MSP432E401Y: Target failed to see a correctly formatted SWD header (Error -615 @ 0x0)

CC2340R5: Not able to program CC2340 by uniflash.

CC2745R10-Q1: CC2745R10 + XDS110 persistent CS_DAP_0 Error -614 in CCS, UniFlash, and DSLite

Regards,
Shaunak

XDS110ISO-EVM: Request for Replacement of Faulty XDS110 Debug Probe

Ranganath Kuntumalla — Thu, 15 Oct 2026 11:27:57 GMT

Part Number: XDS110ISO-EVM

Dear TI Support Team,

We recently purchased 5 XDS110 Debug Probes, and during testing, we identified an issue with one unit. The other four units are working properly under the same testing conditions.

We performed the following troubleshooting steps on the faulty unit:

Verified the USB connection and confirmed that the probe is detected by the PC.
Checked the firmware version using the XDS110 Firmware Upgrade Utility. The detected version is 3.0.0.41, and the probe is operating in Runtime mode.
Tested the probe using the dbgjtag utility with the SWD integrity test.
Encountered the following error during the SWD test:

Error: SC_ERR_SWD_PROTOCOL (-615)
Description: The target failed to see a correctly formatted SWD header.

Additionally, when attempting to connect to the target through Code Composer Studio (CCS), we encountered the following error:

CS_DAP_0: Error connecting to the target: DAP Connection Error.

We have performed these tests using the same target board, USB cable, and PC that work with the other XDS110 units. Based on our testing, the issue appears to be specific to the faulty probe.

We kindly request your assistance in arranging a replacement for the defective XDS110 Debug Probe. Please let us know the RMA procedure, warranty requirements, and any additional information or documentation needed to proceed.

Thank you for your support. We look forward to your response.

Best regards,
Ranganath

xsd110_ststus.txt

RE: XDS110ISO-EVM: Request for Replacement of Faulty XDS110 Debug Probe

Shaunak Deshpande — Fri, 16 Oct 2026 03:49:49 GMT

Hi Ranganath,

Can you please reach out to your local FAE/Sales contact?

Regards,
Shaunak

RE: CCSTUDIO-THEIA: AI assistant base URL issue

Ki — Thu, 15 Oct 2026 22:55:23 GMT

[quote userid="290290" url="~/support/tools/code-composer-studio-group/ccs/f/code-composer-studio-forum/1689567/ccstudio-theia-ai-assistant-base-url-issue/6511530"]As you ask, I installed VS code and codex extension. I didn't configure anything as it seems to use the same config.toml file that CCS, but I also get the same behaviour with the same error message[/quote]

Thank you for trying this. This seems to indicate that this is not a CCS specific issue but more an issue with the Codex extension for VS Code (which is similar between CCS IDE and VS Code). It could be some issue with the extension or perhaps how the extension expects the base url to be formatted.

When searching around, it seems like the "/responses" at the end of the url could be causing issues. Can you try:

oai-t-foundry-agentai.openai.azure.com/.../

Thanks

RE: CCSTUDIO-THEIA: How can I export raw data from TI (Texas Instruments) as 16-bit values in CCS version 21.0?

Ki — Thu, 15 Oct 2026 22:49:00 GMT

Hi Andrew,

Honestly, the type size has no real value without byte swapping enabled. It is really only used to properly handle byte swapping. What was your expectation for setting a type size but with byte swapping disabled?

Thanks

PROCESSOR-SDK-LINUX-AM62X: AM62x: Can MCU and A53 Linux application development be integrated into the same CCS environment?

Takahumi_K — Thu, 15 Oct 2026 09:09:41 GMT

Part Number: PROCESSOR-SDK-LINUX-AM62X

Hello TI Support Team,

We would like to confirm whether MCU application development and Cortex-A53 Linux user-space application development can be integrated into the same Code Composer Studio (CCS) environment.

Our customer would prefer to use CCS for both development workflows.

Environment:
- Evaluation board: SK-AM62B-P1
- Processor SDK Linux for AM62x: 11.02.08.02
- CCS version: 20.3.1
- Host OS: Ubuntu 22.04 LTS
- Application language: C
- Toolchain: GNU cross-compilation toolchain included in the Processor SDK Linux

We have already verified cross-compilation, file transfer, and execution of a Hello World application on the target Linux system.

We would like to perform the following operations from CCS:
1. Cross-compile Linux user-space applications using the SDK-provided GNU toolchain and sysroot.
2. Transfer the executable to the target using SSH/scp or an equivalent method.
3. Execute the application on the target.
4. Debug the Linux application using GDB/gdbserver, including breakpoints, stepping, variable inspection, and call stack inspection.

Please note that this question concerns Linux user-space process debugging after Linux has booted. It is not about JTAG connection to the A53 core, U-Boot debugging, or Linux kernel debugging.

We would appreciate clarification on the following points:

1. Are the operations listed above supported in the specified CCS version?
Please distinguish between:
- Standard CCS functionality
- Functionality requiring additional extensions or configuration
- Unsupported functionality

2. Is this workflow officially supported by TI for Processor SDK Linux AM62x 11.02.08.02?
If supported, are there any requirements or restrictions regarding CCS, GDB, gdbserver, or the MCU+ SDK version used alongside the Linux SDK?
Can the same CCS version be used for both MCU application development and A53 Linux user-space application development?

3. Could you provide applicable documentation or a Hello World example covering project creation, SDK environment setup, cross-compilation, file transfer, and GDB/gdbserver configuration?
We need instructions applicable to the specified CCS version, rather than instructions for older Eclipse-based CCS versions.

4. Can cross-compilation and target-side operations be invoked separately?
The target board is not always connected, so we need to build applications while disconnected from the target and separately initiate transfer, execution, or debugging when the target is connected, without requiring another build.

5. We reviewed the following documentation and E2E discussions:
- Processor SDK Linux 11.02.08.02, “Tools” page
- E2E thread 1434672: AM623 JTAG connection to the Cortex-A53 core
- E2E thread 1650908: AM625 Linux C application development using CCS and GDB

The Tools page mentions Code Composer Studio as an Eclipse IDE, while the response in thread 1650908 states that the official documentation does not list CCS for Linux development.

Could you clarify whether the CCS description on the Tools page applies to the specified CCS version and to Linux user-space application development?

6. If this workflow is not currently supported, is there a supported alternative within CCS?
Are there any publicly shareable plans or timelines for supporting this workflow in future CCS releases?
If no plans or timelines are available, please clarify that as well.

We intend to provide a reproducible development environment and setup manual to our customer. Therefore, we would like to distinguish technical feasibility from TI's official support scope.

If necessary, please coordinate with the AM62x Processor SDK Linux team.

Thank you for your assistance.

RE: PROCESSOR-SDK-LINUX-AM62X: AM62x: Can MCU and A53 Linux application development be integrated into the same CCS environment?

Anshu Madwesh — Thu, 15 Oct 2026 20:18:59 GMT

Hello,

This thread was assigned to the correct engineer. Please allow some time for a response.

RE: CCSTUDIO-THEIA: AI assistant base URL issue

Gildas ROLLAND — Thu, 15 Oct 2026 06:12:24 GMT

Hi,

config.toml seems to be OK:

As you ask, I installed VS code and codex extension. I didn't configure anything as it seems to use the same config.toml file that CCS, but I also get the same behaviour with the same error message

regards

F29H85X-MCAL-SDK: GPT-Interrupt Issue

Ananya N K — Wed, 14 Oct 2026 19:04:08 GMT

Part Number: F29H85X-MCAL-SDK

Hi, we have configured for Gpt Channel_0 (CPU Timer 0), for continuous mode for 10ms without OS ISR in EB Tresos. The interrupt is being generated only once.

PFA the configuration file fyr

GPT_V1.zip

#define APP_GPT_CH0_INT_ID (6U)

#define APP_INT_PRIORITY_DEFAULT (255U)

#define APP_INT_THRESHOLD (20U)

#define APP_PIPE_LINK_OWNER (2U)

/*********************************************************************************************************************

* Local Type Declarations

*********************************************************************************************************************/

MCAL_LIB_INT_ISR(Gpt_Ch0Isr);

uint32 Gpt_InterruptCnt[GPT_CFG_MAX_CHANNELS] = {0U};

static void App_RegisterInterrupt(uint32 InterruptId, uint32 Priority, uint32 IsrAddress)

{

uint32 int_config_addr = PIPE_BASE + PIPE_O_INT_CONFIG(InterruptId);

uint32 int_link_owner_addr = PIPE_BASE + PIPE_O_INT_LINK_OWNER(InterruptId);

HWREG(int_link_owner_addr) = (HWREG(int_link_owner_addr) & 0xF0U) | APP_PIPE_LINK_OWNER;

HWREG(PIPE_BASE + PIPE_O_INT_VECT_ADDR(InterruptId)) = IsrAddress;

HWREG(int_config_addr) = (HWREG(int_config_addr) & ~PIPE_INT_CONFIG_PRI_LEVEL_M) | Priority;

HWREG(PIPE_BASE + PIPE_O_INT_CTL_L(InterruptId)) = PIPE_INT_CTL_L_EN;

}

static void App_InitBareMetalInterrupts(void)

{

MCAL_LIB_DINT;

HWREG(PIPE_BASE + PIPE_O_GLOBAL_EN) = PIPE_GLOBAL_EN_KEY;

HWREG(PIPE_BASE + PIPE_O_MMR_CLR) = 0x3U;

HWREG(PIPE_BASE + PIPE_O_MEM_INIT) = PIPE_MEM_INIT_KEY | 0x3U;

while (HWREG(PIPE_BASE + PIPE_O_MEM_INIT_STS) != 0x2U)

{

}

HWREG(PIPE_BASE + PIPE_O_INTSP) = APP_PIPE_LINK_OWNER;

HWREG(PIPE_BASE + PIPE_O_RTINT_THRESHOLD) = APP_INT_THRESHOLD;

HWREG(PIPE_BASE + PIPE_O_INT_GRP_MASK) = 0x00U;

App_RegisterInterrupt(APP_GPT_CH0_INT_ID, APP_INT_PRIORITY_DEFAULT, (uint32)Gpt_Ch0Isr);

HWREG(PIPE_BASE + PIPE_O_GLOBAL_EN) = 0x3U | PIPE_GLOBAL_EN_KEY;

MCAL_LIB_EINT;

}

/*main function */

int main(void)

{

Mcu_Init(NULL_PTR);

#if (STD_ON == MCU_CFG_INIT_CLOCK_API)

Mcu_InitClock(McuConf_McuClockSettingConfig_McuClockSettingConfig_Osc2);

while ( MCU_PLL_LOCKED != Mcu_GetPllStatus() ) /* Get PLL status and check */

{

/* Wait until all enabled PLLs are locked */

}

#if(STD_OFF == MCU_CFG_NO_PLL)

Mcu_DistributePllClock();

#endif

Port_Init(NULL_PTR);

Gpt_Init(NULL_PTR);

App_InitBareMetalInterrupts();

/* Reset Counters */

Gpt_InterruptCnt[GPT_CHANNEL_0] = 0;

Dio_WriteChannel(DioConf_DioChannel_DioChannel_0, STD_LOW);

Gpt_EnableNotification(GPT_CHANNEL_0);

Gpt_StartTimer(GPT_CHANNEL_0, GPT_COUNT_VALUE_10MS);

Time_Delay(33);

while(1)

{

}

/* Time delay*/

int Time_Delay(float64 seconds)

{

McalLib_Delay(GPT_TIME_DELAY_PER_SECOND * seconds);

return 0;

}

/* GPT timer channel 0 notification function */

void Gpt_Notify_Func_0(void)

{

Gpt_InterruptCnt[GPT_CHANNEL_0]++;

Dio_FlipChannel(DioConf_DioChannel_DioChannel_0);

}

RE: F29H85X-MCAL-SDK: GPT-Interrupt Issue

Nikhil Dasan — Thu, 15 Oct 2026 06:08:34 GMT

Duplicate thread. Closing this. Lets continue discussion here F29H85X-MCAL-SDK: GPT-Interrupt Issue - Clock & timing forum - Clock & timing - TI E2E support forums

RE: CCSTUDIO-THEIA: AI assistant base URL issue

Ki — Wed, 14 Oct 2026 17:12:08 GMT

If you open the config.toml file in an editor, do you see the base URL properly specified in there?

If you have VS Code, does the Codex extension in there work as expected?

RE: AM3358: CCS 12 working with JTAG probe XDS200 to trace U-boot and vmlinux based on AM335 SDK

Vinuchandran A V — Wed, 14 Oct 2026 17:11:55 GMT

Hi Kal,

Thanks for sharing the information.

We also face the same CCS crashing issue on our side.

I'll let you know once I find a fix. Please expect some delay.

Regards,
Vinu

RE: AM3358: CCS 12 working with JTAG probe XDS200 to trace U-boot and vmlinux based on AM335 SDK

Kaloyan Dimitrov — Wed, 14 Oct 2026 15:19:10 GMT

Hi Vinu,

I am looking forward to your pointers, so that we can solve the kernel debugging issue.

Just a little bit of extra info I am able to load the vmlinux with gdb and analyse it with addr2line, so it is not a broken artifact and debug data is included in it.

The size of kernel zImage that I use for booting my system is 5.2M and its corresponding vmlinux with debug symbols included is 87M. CCS 12 is consistently terminating when I try to load the vmlinux and stops being responsive at the 60% mark so roughly when 52M are being transferred.

Regards,

Kal