This thread has been locked.
If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.
Part Number: TPS54340B-Q1
Tool/software: WEBENCH® Design Tools
Hi TI support,
I recently made the design using TPS54340B-Q1 with details as under,
VIN=12-18V, Vout=4.0V, IOUT=2.5A max, Tamb=60'C, Freq=918KHz. I replaced the compensation components as per calculation from datasheet with cross freq of 29Khz. Now Op-Val shows correct cross over freq. after replacement of compensation components, however bode plot simulation doesn't shows those values.
Can you please check this. If some email ID is available I could share the design.
We are glad that we were able to resolve this issue, and will now proceed to close this thread.
If you have further questions related to this thread, you may click "Ask a related question" below. The newly created question will be automatically linked to this question.
In reply to David Baba:
In reply to Jagdish:
Can you please share you design with "Share with Public" option? If you can share the design, we can check if you are running into any of the 3 issues mentioned below.
Some reasons why the opvals and bode plot sim might not match:
In reply to Amod Vaze:
Hi Jagdish, It seems the issue is arising due to discrepancy in the sim and opval model parameters. Someone from our team is looking into it and will get back to you with further updates. Apologize for the inconvenience caused and appreciate your patience on this matter.
For now, I would recommend using the opvals and recomp values to compensate and confirm the results and stability of your design.
Seems like the difference between Simulation Bode plot & Opval Bode Plot was due to edited Rload (20ohm).
Could you please let us know if you had manually changed Rload to 20ohm ?
Note: Any changes made to Input source & Rload in the schematic will not affect Opvals. Hence we might be observing discrepancy.
I made following changes in the schematic (Below is the shared design FYR) :
1. Cout : Made Cap, Total Derated cap and Derated Cap as 52uF with Quantity = 1
2. Rload: Changed to 1.6ohm [Iout = 2.5A]
Thanks & Regards,
If above reply answers your question please click on "This resolved my issue" button
In reply to Harish K R:
All content and materials on this site are provided "as is". TI and its respective suppliers and providers of content make no representations about the suitability of these materials for any purpose and disclaim all warranties and conditions with regard to these materials, including but not limited to all implied warranties and conditions of merchantability, fitness for a particular purpose, title and non-infringement of any third party intellectual property right. No license, either express or implied, by estoppel or otherwise, is granted by TI. Use of the information on this site may require a license from a third party, or a license from TI.
TI is a global semiconductor design and manufacturing company. Innovate with 100,000+ analog ICs andembedded processors, along with software, tools and the industry’s largest sales/support staff.