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TIDA-01573: Three questions about the TIDA-01573 laser driver

Part Number: TIDA-01573
Other Parts Discussed in Thread: LMG1020

Dear Sir/Madam,

We are group of bachelor students from Delft University of Technology, who are currently working on their bachelor final assignment. We are designing and building a transmit stage of a subsea LiDAR system, currently we are using the TIDA-01573 laser driver circuit to drive our laser diode, PLT5 520B by OSRAM.

However we have encountered with some roadblocks within the design of our system. From this, we have several questions regarding the laser driver circuit TIDA-01573.

1) We have uncovered that the pulse width at TP4 (measurement point) is dependent on the peak-to-peak voltage of the 100 ns pulse that we feed to the input of the pulse shortening buffer (at J3). We believe this has something to do with the RC circuit (R9 and C11) at the AND Gate or could it be that the rise time of our function generator varies per voltage level? Or could it be something else?

2) The datasheet of TIDA-01573 mentions that the peak-to-peak voltage of the pulses should lie between 0-3 V (page 11 TIDA-01573). Yet the SN74LVC1G08DCKR AND gate has a threshold voltage of 0.7*VCC, with VCC being 5 V. From this, the threshold would be 3.5 V. So we were wondering why does page 11 of TIDA-01573 mention that a 0-3 V pulse would suffice?

3) As mentioned before, we are using a green laser diode, PLT5 520B by OSRAM. We tested this laser diode with the laser driver circuit and this showed that the laser diode could not withstand a 3 ns pulse width signal with a repetition rate of 1 kHz. Also the bus voltage was 27 V at this setting. Our current theories as to why the laser is not capable of withstanding these set values is either the laser diode experiences electrical overstress due to overvoltage or overcurrent or that the inductive overshoot exceeds the maximum reverse bias voltage of the laser diode, which is 2 V. Seeing as your vast knowledge of laser driver design exceeds ours, do you happen to know if either of these two theories apply to our problem? Is there more at play? If this is the case, do you happen to know a solution to this problem?

With kind regards,

Lynrick and Eva

  • Hi Lynrick and Eva,

    thanks for your question on TIDA-01753 and welcome to e2e! sounds like a cool project.
    1) The RC and AND combo act as a pulse shortener. Details on this can be found in the LMG1020 EVM user guide (www.ti.com/.../snou150a.pdf) let me know if you have any further questions. The FG varying the voltage level might change the rise/fall time at the output of the FG or input of the AND gate which would slightly change the pulse width seen on TP8 or the output of the AND gate if the time to reach the logic high threshold was changed. What kind of pulse width difference are you seeing?
    2) The pulse shortener can be bypassed and the 0-3V signal in which case it would go directly to LMG1020's IN+ pin which can accept 0-3V. I will make sure to update the TIDA to reflect this asap. It should say 0-5V when using the default EVM like you said. Thanks for letting us know.
    3) PLT5 520B's max forward voltage is 8V and the typical is 6.4V. Does the circuit work when Vbus = 6V?
    let me know if this helps answer your questions, or you have any more!

    thanks,