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TIDA-01573: The addition of micro vias

user6017701
Prodigy 10 points
Part Number: TIDA-01573
Other Parts Discussed in Thread: LMG1020

Dear Sir/Madam,

We are currently working designing a LiDAR system, for this we want to use the reference design of the TIDA-01573. We want to integrate the design in our own system, therefore we are considering to redesign it a bit. We however have a limit budget, therefore it is actually not an option to use the blind micro vias. In the reference design focus has been put on the fact that microvias are necessary to limit the parasitic inductances, keep the return current loop as small as possible and to improve the vertical current extraction from components. I must note that we do not have much experience with high frequency design, our current idea is the following; since the the wavelength of the signal, 0.3 m when considering a 1ns pulse, is more than 10x greater when compared to the thickness of the PCB, which is 1.6mm the stub created by an all through via should not influence the performance. Therefore it must be possible to use an all through via with a drill diameter of 1.5mm, or are we not considering other effects, if so could you enlighten this?

Next we were also wondering whether it is possible to place these all through vias not directly on the pad of the EPC2019 and the LMG1020 but as close as possible to the pads. Since placing the via on the pad could lead to the solder paste getting sucked in the via capillarily, leaving too little to solder the part's connection. Of course placing the via's of the pads would mean that the EPC2019 would have one less via, in its 4th pad which is connected to the PWRGND and the area surrounding the EPC2019 would also be changed a bit. We believe that changing this would only add some extra inductance, but have not been able to determine how much and whether other effects are at play. Therefore we hoping you could give us more insight into your desicion of using blind microvias instead of the less costly standard all-through vias?

Laslty we were considering the impact of increasing the hole drill diameter from 0.15 to 0.2mm, increasing this would also influence the layout and the via would not be able to fit on the pads of the EPC2019 and LMG1020. But if not placing the vias on the pad has limited influence, maybe increasing the diameter size would also not greatly influence the design.

As you might tell we have little experience and are wondering whether we are making the wrong assumptions, therefore we really hope that you could help us by giving an explanation of how much our current idea of using all-through vias placed on or off the pads would negatively influence the performance of the TIDA-01573?

Thanks in advance, we hope to hear from you soon.

With kind regards,

Eva

  • 0
    TI__Guru**** 189399 points
    Hi, Eva,

    Thanks for your interest in our LMG1020. Our offices are closed until Tuesday for the Memorial Day holiday here in the US. On Tuesday, we will respond to your post.

    Is it possible for you to use our board for your work? This is a proven design, and making your own PCB will be tricky as you know. Look at the LMG1020 EVM. I highly recommend you use this EVM for your project.
  • 0
    TI__Genius 12990 points
    HI Eva,

    thanks for reaching out about TIDA-01573 (same as LMG1020 EVM) and welcome to e2e!
    For the EVM, a microvia in the pad is there to reduce the inductance of the VDD source and return path as well as the gate return loop. The via in the pad should be in the source of the GaN and connected immediately to the driver GND to prevent ground bounce and voltage drop working against the drive voltage which would slow down rise and fall times. Make sure the gate loop as well as the power loop is as small as possible by reducing the trace length and increasing the trace width. See the LMG1020 EVM altium layout files as a reference. Through vias in pads of the same mil hole size diameter (for ex, if laser drilled) will perform similar to microvias in the same in pad location. The electrical performance will differ only with longer trace inductance. The thermal performance will be optimal for the via that connects to the most copper for ex the ground plane on each layer. The cost may be more but if there is a significant amount of microvias the cost might be smaller as well as the cost savings you will see with a smaller PCB board. The low layout inductance requirement is only needed for high peak laser current and 1-2ns pulse-widths for long distance lidar. What laser are you using that is 0.3m wavelength (does this mean you are using 1GHz switching frequency?) with 1ns pulses? what peak laser current is needed? what end application is this lidar for?

    thanks,