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TIDA-00527: Master A-B signal issues

Rafa Crespi
Prodigy 80 points
Part Number: TIDA-00527

Hi, 

We are trying to add Power-over-data to our RS485 products. Before design, we are testing if adding AC-Coupling makes keep working our products.

We have two nodes (Master and Slave),and we have added to every node C7, C8 and R1, as in the TIDA-00257 schematic:

This is the resulting AB signal:

First frames are Master Request. Next are Slave Response.

 As you can see Master waveform is not corresponding with the one expected. As a consequence, the slave misinterprets the request and given response is detected as incorrect on the Master

Any idea of why is happening this?

Kind Regards,

  • 0
    TI__Guru 62910 points

    Rafa,

    My guess is that this is just the effect of the high-pass filter formed by the series capacitors and the end-of-line termination.  If the RC constant of this filter is short compared to the bit durations then you could see just the signal transitions make it to the receiver and then sharply decay.  This would be easier to confirm if you could zoom in on the time scale and view the signals on both sides of the AC-coupling capacitances (to make sure that they look OK prior to the caps).

    FYI, I haven't forgotten about our other thread and I will reach out to you later this week via email.

    Max

  • 0 in reply to Max Robertson
    Prodigy 80 points

    Hi Max,

    Here the Master Request  on Master node before RC (yellow) and on Slave node after RC (red)

    So solution would be increasing RC time constant, it is?

    Kind Regards,

    Rafa

  • 0 in reply to Rafa Crespi
    TI__Guru 62910 points

    Rafa,

    Yes, it seems the current filter causes distortion particularly in the periods where the master sends several low bits in a row.  If it is possible for this link to operate without a termination resistance then removing that would be one simple way to significantly increase the RC.  (Otherwise, larger capacitances could be used but may become impractical if too large.)

    Regards,
    Max

  • 0 in reply to Max Robertson
    Prodigy 80 points

    Hi, 

    Ok I will try it.

    Kind Regards,

    Rafa

  • 0 in reply to Rafa Crespi
    Prodigy 80 points

    Hi Max, 

    With these steps I am able to have Master - Slave communication over RS485.

    - Removing termination resistor

    - Increasing the capacitors value (Currently I have capacitors  value = 40 uF)

    - Pulling up A to 5V and pulling down B to 0V in the Slave side 

    We keep having some problems, because of the lenght of communication frames. In our case, we are using Modbus RTU. As long as capacitors value increases, we can read a greater number of addresses at one time.

    Kind Regards, 

    Rafa

  • 0 in reply to Rafa Crespi
    TI__Guru 62910 points

    Hi Rafa,

    That sounds like a good solution.  You may want to consider biasing A and B to not have such a great differential offset - for example, by using resistive dividers to set A to 3 V and B to 2 V.  That way, when the receiver sees a first "low" bit after the line is idle for some time (and the voltages at each pin decay to this bias point) there is some room for the "B" line voltage to exceed the "A" line voltage with some margin so that a logic-low is reliably detected.

    Max