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TIDM-BUCKBOOST-BIDIR: Doubts about duty cycle calculations

Part Number: TIDM-BUCKBOOST-BIDIR

Hello.
We are developing a Li-ion battery charger and we took the TIDM-BUCKBOOST-BIDIR reference design as a starting point because it satisfied most of our requirements.
I would like to better understand a couple of things related to how the duty cycles are calculated. Here are my doubts (it is assumed closed loop operation and forward mode):
-First of all, why is the Duty variable multiplied by 2 in _DPL_Func before calculating the duty cycles (it is implemented in assembly code as a shift: LSL ACC,#1)? I understand that under closed loop operation, it would just act as a gain in the loop, but does it have a particular reason to be?
-Is it really needed to do MOVL ACC,@XAR0 at the beginning of each mode?
-Could you explain why it is used the approach with the constants C1, C2 and C3 instead of a simpler division to achieve the expected gain (based on Vo/Vi=Dbu/(1-Dbo))? Is it to avoid divisions because of the CPU load involved in that? Furthermore, how are those coefficients supposed to be obtained? I saw the spreadsheets but I did not understand the procedure. Should we experiment with different values for those coefficients and see the efficiency for each case or is there a more methodical way to proceed?
Thank you in advance.

  • Hi Roman,

    I am not sure which C2000 device are you plan to use for your project. This reference design is done based on a very old C2000 device that does not have floating point unit and limited MIPS, hence we used many Assembly code to write the main ISR which runs at high frequency. If you were to do any new design, I would recommended you consider one of our newer devices (such as F28002x) which has FPU, TMU and higher clock. For the new device, you does not need to go with hand written assembly any more. Written the ISR in C code and compile (with optimization on) should be fast enough for the digital control loop. 

    For your questions, I will try to answer based on what I can recall from looking at the code:

    1. The control output Gain should be scaled to 0-2 before sending to the next stage (as described in the table below). I would assume the assembly version of the compensator will by default clamp the output to 1, hence need a LSL ACC, #1 to scale it to 0-2.

    2. This piece of code is implementing a if ... else if.... else... type of logic, and only one of the mode is being executed. That is why fetching the value of @XAR0 into ACC is required at the beginning of each mode. Please refer to the table below for the logic implemented.

    3. Again, please refer to the logic of the Gain to duty cycle conversion code in table below. This table is in page 5 of design guide. C1, C2, C3 are based on open-loop measurement on the power stage to linearize the power stage so that the output / input is close to the Gain (at lease in most regions)

    Han

  • Hi Han.
    Thank you for the advice regarding the use of newer devices. We will consider it.
    With respect to your answers:
    1. Ok, I understand.
    2. Yes, I understood the logic. However, my doubt is why is it fetched if the content of ACC is not modified (at least, explicitly, I might be missing something) and the last thing that was kept there was the value of @XAR0. Is it really necessary to do that? Does not it already have that value?
    3. Great.

  • Hi Roman,

    The code take value into ACC register, do some calculation to the value, and store the calculation result into other memory location. Please see below example:

    Han

  • Sorry, I think you are not understanding my point. What I am trying to say is that my guess is that the first line (MOVL ACC,@XAR0) could be removed because the value of ACC was not modified previously. The code below shows what I mean. There it can be seen that ACC was not modified. Am I wrong?

    ...
            .ref _C2_value
    		.ref _ConstBuckModeDuty
    		.ref _C3_value
    		.ref _Buck100Count
    		.ref _Boost0Count
    		MOVW 	DP,#(_Duty)
    		MOVL	ACC,@_Duty
    		LSL		ACC,#1
    		MOVL	@XAR0,ACC
    		CMPL 	ACC,@_BuckModeMaxGain
    		B BUCK_MODE, LT
    		CMPL	ACC,@_BrAModeMaxGain
    		B BRIDGE_MODE_A,LT
    		CMPL	ACC,@_BrBModeMaxGain
    		B BRIDGE_MODE_B,LT
    		B BOOST_MODE, UNC
    
    BUCK_MODE:
    ...
    
    BRIDGE_MODE_A:
    		;MOVL	ACC,@XAR0                    ; COULD BE AVOIDED, RIGHT?
    		SUBL	ACC,@_C1_value
    		MOVL	@_DutyBuck,ACC
    		MOVL	ACC,@_ConstBoostModeDuty
    		MOVL	@_DutyBoost,ACC
    		B PWM_UPDATE_BUCK, UNC
    ...

  • Looks like you are correct. I cannot guarantee since I have not tested removing the line.

    Again, I would recommend you to write your software in C for new development unless you find your ISR cannot be finished within the allocated time. 

    Han