This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

PMP23546: PMP23546 Voltage Rerfence regulator function

Part Number: PMP23546
Other Parts Discussed in Thread: TPS7H5020-SEP

Tool/software:

Hello,
1) I see that Q1 and U1 with R9/R10 are used as a linear regulator, with Vout ~ 10V why not 12V ?
and why is it connected to +12Vp through a diode afterwards ?

2) R20 & R21 are dummy loads, in real application they should be removed ? 
or they draw minimum amount of current to keep the regulation stable ? 


Thanks! 
Mohamed



  • Hi Mohamed,

    1. The linear regulator is used for start-up. After the flyback is up and running the 12Vp generated by the flyback is used to bias the flyback controller.

    2. The resistors are used to improve the cross regulation for the two outputs in this design. A common drawback to PSR flybacks is how the unregulated outputs can fly up if they are kept unloaded, and the dummy load assists with this. Since the controller will draw current through operation, having that load tied to 12Vp helps to reduce the amount of dummy loading needed for that output.

    Thanks,

    John 

  • Hi John, 
    Thanks for your reply, for the second point how do you size these resistors ?
    if we want to have an aux negative supply, can the same schematic be used but with the addition of another winding on the sec side the recpricoal of what exists now like the below picture ? how would the current rating be affected ?

    Thanks! 
    Mohamed
      

  • Hi Mohamed,

    The resistor value will depend on how much loading is required to stay within a certain regulation range. This is best done in lab where you adjust the cross loading between the multiple outputs until the Vout range stays within the preferred range. Then for sizing you should consider the power loss that the resistor will burn for the specific voltage it operates at. It is difficult to have an exact calculation or simulation since the cross loading is dependent on the transformer winding structure.

    Are the +/- outputs the same voltage and current stress? We have another circuit where you add a ceramic cap between the switch node on the secondary side which really helps out the cross regulation and reduces the amount of pre-load needed. Here's the link to Power Tip #85 on EDN: https://www.edn.com/power-tips-85-adding-a-single-capacitor-to-improve-cross-regulation-in-dual-output-flyback-power-supplies/

    Figure 1 highlights the design you should consider using.

    Thanks,

    John 

  • Hi John, 
    Thanks for the article, they would be the same voltage maybe the +ve current will be higher maybe 1-1.3x the negative current.
    I see in figure 3 that the dummy resistor is decades different, does the more current gets a less resistor value ?

    what is the current capability of this reference design ?
    up to how many amps can it support taking into consideration 1 PRI-AUX, 2 SEC one +ve voltage and the other -ve voltage ?

    BR,
    Mohamed

  • Hi Mohamed,

    In figure 3 the resistors are actual loads. The purpose of that simulation with resistors that are decades apart is used to highlight how in extreme loading conditions the output voltages remain regulated. In practice the actual dummy load needed is much higher.

    PMP23546 is designed for 2.4W max loading, however I added some headroom in design so it could be increased if needed.

    Thanks,

    John 

  • Hi John, 
    Thanks for the info, how much is this headroom ? 
    so for our case since we would have 3x12V each should have a max of 70mA and in case one 12V rail draw more than the other. this power tip link you sent me should work on adjusting the cross regulation. we should receive this soon once we do will use it with Full bridge reference design and come back in case there any other points. 

    Thanks! 
    Mohamed

  • Hi Mohamed,

    I designed the primary side to handle a 5W loading case.

    And correct, this should apply for higher number of outputs.

  • Hi John, 
    1) for the NET Tie. why not connect the Pgnd AND AGND directly to each other on the Schematic ? 
    2) Do you have any application note or excel sheet documenting the design process ? 
    it can be helpful to use it to extend this design to meet our application with higher current and extra negative secondary voltage. 

    Thanks!  
    Mohamed

  • Hi Mohamed,

    1. I wanted to keep the grounds isolated in case of noise generate by the fast transitions of the GaN FET. In testing this did not seem completely necessary at this power level.
    2. The datasheet for the TPS7H5020-SEP has a full design walk-through which I used to create this design. It also discusses how to use the AGND and PGND sections in the circuit.

    Thanks,

    John