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TIDA-00661: High voltage(10kv~110kv) circuit breaker wide input range

Part Number: TIDA-00661
Other Parts Discussed in Thread: TIDA-00499,

Hello smart TI ENGINEER

   NOW  I WANT TO DESIGN A BOARD to collect the voltage  of  High voltage(10kv~110kv) circuit breaker 。the Collected voltages range from -450V to +250V, or from -65V to +60V。There are four  pictures below,the first pic is the digram of the whole frame,the second is the signal  of a point which is Affected by VFTO,the third one is the signal of B point which is also Affected by VFTO. THE LAST ONE IS THE signal of A point and B point and c  POINT and  d POINT AT STEADY STATE. Can you recommend me a similar reference design? or  some suggestion on Common treatment of such signals! thank you very much !

  • Hello

    VFTO is a high frequency phenomenon and depends on the load and restrikes during breaking of the load switch or the CB.

    TIDA-00499 can be an option. The board can be interfaced to 25 MHz or 125 MHz pin compatible high speed ADC based on the sampling requirement.

    Is this for research or are you designing any product?



  • Hi ,Sreenivasa,Thank you !I still have some other questions. Can you answer me?See attached!other question.pdfother question.doc

  • Hello,

    Here is my reply

    FirstSince I currently only have the image information aboveIf only look at the picture, is there a way to get the frequency of the VFTO from the pic?If not, can you tell me the general frequency of VFTO which produce by the MV circuit breaker?


    You can look at the time base in us and get the values. Generally the frequency depends on number of factors and ranges from 25-30 ns  and more.


    SecondMy design is to record VFTO signal, DC 220V voltage, and some other small voltage.If the DC 220V is collected, is this resistor divider circuit still applicable? From TIDA-00499,I know for large voltages around VFTO 2kV, use large resistor divider. If it is 220V or other small voltage of several hundred V, should the resistance of the resistor be adjusted

    Please adjust the divider as per your input range including the maximum expected voltage


    Third,There are two systems in my system, one is the chassis grounding, and the other is the chassis is not grounded. The maximum voltage range is -450V to 250 when not grounded, but the ground voltage is -3.5KV, and the recommended circuit diagram of TIDA-00499 is still applicable .

    TIDA-00499 is tagged for surge and up to 2 KV peak positive or negative.

    Please change the design as per the calculated input range.



    It would be a good idea for someone to have a face to face discussion to understand the system requirements more before providing inputs or suggestion.

    Please consult your local sales team and they can help you find the right apps engineer.






  • hello Sreenivasa
    FAE in my area tells me that“ VFTO has a very wide spectrum width from tens of Hz to hundreds of MHz,Therefore, to fully study VFTO characteristics, the measurement system bandwidth should be greater than 100MHz.Generally, the VFTO waveform is recorded by an oscilloscope with a sampling rate of 1 Gsps or more. Besides , such a high bandwidth should not be suitable for extraction with a large resistor divider. because Low-pass filters formed by large resistors and stray capacitance limit system bandwidth and fail to achieve sufficient bandwidth” so if I want to achieve high bandwidth, the front end needs to use capacitor voltage division and Both op amps and ADCs require very high bandwidth。besides TIDA-00499 is designed to test surge voltage。It is not suitable for me to record VFTO.
    then i have no idea for my design。please help me!
  • Hello

    Please see my previous thread where I have recommended TIDA-00499.

    TIDA-00499 can be can be interfaced to 25 MHz or 125 MHz pin compatible high speed ADC based on the sampling requirement.

    The frontend is customer dependent and you may want to take measurements to understand the best option.

    You can test with different resistor divider values to understand if you can achieve the required performance and if that does not work you can look at alternative approaches.

    Higher bandwidth amps always would be a good option.

    Doing experiments' may be the best way for you to to understand the best implementation  and achieve the required performance.



  • hello  Sreenivasa

          I simulated the analog input front-end circuit and found that if the signal frequency is greater than 1Mhz, the output waveform is wrong. but I want to design a circuit that can capture 40M input signal.I also find  if  I  remove all the cap ,the output is right ,but the output scope is not very good。 So Is it necessary to adjust some parameters of the circuit ,especially the bandwidth of the circuit,for the high-frequency input signal ? I don't know how to adjust, can you tell me how to adjust the parameters of the circuit?Is there a manual explaining how to calculate the value of the resistor and capacitor in the circuit?

       Besides, there is a paragraph on page 19 “The potential divider resistance is 1650 kΩ and the differential amplifier feedback resistance is 499 Ω. The ADC input range is 1 V at the peak. The gain is approximately 3300, which enables measurement of a peak transient of approximately 2.5 kV”  But I still don't know how 2.5kv came. Is 1V*3300*0.707=2333.1 which close to 2.5KV?

    the attached file one  is  no caps ,one is with caps。     


    1348.ths4521_TIna_NO cap.TSC

  • hello.i am be waiting for your reply!
  • Hello 

    The focus of TIDA-00499 was to capture 1.2/50 us surge within 5% and so caps are fine.

    Yes, it is a good idea to remove the caps for higher frequency or consider an alternative approach as i have considered > 1M in the design.

    Please consult your local sales and FAE and he can help you in making the required selection.

    We do not have a more detailed explanation on designing the passives.

    The attenuation is 3300 and we are looking to capture the peak, so remove .707 from the calculation and you will get the required range.

    Hope this helps.



  • Hello
    I have provided the reply .
  • I still don't understand a problem. Usually the structure of the circuit is like this。

    but  in your design,the circuit like this

    so  i want to there is  no RT+ ,so how can you calc out the value of  the RG+?

  • Hello

    Please refer to TIDA-00499 to understand more on the calculations. The architecture is input dependent and would recommend to implement as applicable in your system and do some testing. Also please note that the TIDA-00499 may not work for the BW requirement you have and you will have to choose different amp and components.

    Could you provide more details on the project including End Equipment name, Customer name, Project start date and estimated volumes.

    Also based on the project schedule please reach out to a local support for a face to face meeting and better resolution.

    TI designs are made for customer to use as a reference and for a focused application. The design guide is a detailed one and expect customers to leverage the guide for designing their End Equipment with minimum or no support.

  • Hello
    Please refere to section as below in the design guide.
    4 Transient Recorder and Digital Fault Recorder AFE—Design Theory
  • information too less.I want to know your circuit 2.2k was not populated ,and your circuit is not standard circuit single end to differential ,so how do you calc the value of resistor r8 and r22?  why  the negative input of the op  connect  to VREF?

  • Hello 

    The AFE can be used to measure partial discharge measurement in medium-voltage (MV) power systems.

    for this configuration, the diff amplifier is configured as a unity gain amplifier and you do not use any potential divider 

    Next application is measuring output of a secondary sensor for TWFL and FL. In this case also you will use the same differential amplifier configured as unity gain amplifier. the gain is R7/R8.

    Instead of using external sensor, if you use a potential divider ( this is not the case always,)


    For Transient recording the performance criteraia is not measurement accuracy, it is the capability to capture the transients at a higher samplig rate and varying amplitude.

    The transient is riding  on 50 or 60 Hz signal as shown in the picture 

    In this case the gain is  ADC range = R7/ ( R8 + PD value) * Transient voltage input range. The gain is adjusted based on input range and adc range 

    Now transient input is 2250 V and ADC range is 2.5V ( all are peak values)

    Ex: .5K/550K  = 1/1100 * 2250V = ~2.5V.

    Now in this configuration, R22 is also changed accordingly to minimize gain errors.

    Hope this helps.

    For designing using high speed amps for you application, please open a new thread with high speed amplifier as the title as against TIDA-00661 which is more for circuit breaker signal conditioning to reach out to the right high speed amp support.


  • first ,you still not tell me why the negative end of OP connected to VREF,i think if you want to be level shifted by VDD/2,just only connect VOCM of OP to vref, why the negative end of OP connected to VREF ,too?

    second ,in you answer above , what is PD value? why use 5k/550k to make a example ? I think 5K/550K not equal to 1/1100 * 2250V 。
    third ,you say R22 is also changed accordingly to minimize gain error ?Is there not equation to calc the value of R22?
  • Hello,

    first ,you still not tell me why the negative end of OP connected to VREF,i think if you want to be level shifted by VDD/2,just only connect VOCM of OP to vref, why the negative end of OP connected to VREF ,too?

    Please note the negative input is level shifted  to measure bidirectional input. TI design showcases specific application and an approach to implement the required functionality. As suggested by you, there are alternatives and you can use your judgement to make the changes as required. We have tested with the configuration and provided the test report as a reference. We encourage you to make changes and we have provided the altium database for you to do the changes.

     second ,in you answer above , what is PD value? why use 5k/550k to make a example ? I think 5K/550K not equal to 1/1100 * 2250V 。

    Thank you for letting me know that 5K/550K not equal to 1/1100 * 2250V.

    If you review the formula in my previous reply it is, Ex: .5K/550K  = 1/1100 * 2250V = ~2.5V. 550K is the impedance used  for Digital Fault Recorder and I have used that to be able to explain in the simplest possible way as compared to transient recorder.

    third ,you say R22 is also changed accordingly to minimize gain error ?Is there not equation to calc the value of R22?

    You might have to consult high speed amps application notes for the details you are looking for. R22 impedance is same as the impedance on the input side when connecting the potential divider and will need to be tested accordingly.

    As mentioned previously, TIDA-00661 is a TI design for MCCB and ACB application and not for MV or HV GIS breaker application. The Design guide provides most of the answers and needs.

    Please start a new thread with the caption High Speed ADC ( 100 MSPS ) and High Speed Amps to get the required support.