TINA/Spice/ISO1212: Clarification of ISO121x Simulation Model Coverage?

Tool/software: TINA-TI or Spice Models

We are simulating using the ISO1212 TINA test bench downloaded from the TI Web page. There are 11 notes listed under TEST BENCH DESCRIPTION. Can you clarify what is meant by notes 8, 9, and 10?

For example:

Note 8: I would interpret this to simply mean that current into Vcc1 pin is not modeled? Or does it mean something other than this?

Note 9:This just means that the model will simulate a shut down if internal dissipation exceeds limits correct?

Note 10: What is the significance of note 10? Which ground pins does it refer to? And does this just mean that these grounds have to be externally connected? Or are there some other implications?

Thank You.