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TIDA-00580: Reduction of several TTL/RS422 incremental/quadrature encoder signals on the collector board for transport to FPGA/Microchip

MSH
Prodigy 20 points
Part Number: TIDA-00580
Other Parts Discussed in Thread: SN74HC165

Which possibilities exist to merge signals of >=4 incremental/quadrature Encoders with following signals:

2x TTL

  • A
  • B
  • Z
  • [optional] Err

2x RS422

  • A
  • A^
  • B
  • B^
  • Z
  • Z^
  • [optional] Err

Which makes at minimum 2 x(ABZ)+2x(AA^BB^ZZ^) = 22 lines, using similar physical layer so if all are differential a minimum of 4x(AA^BB^ZZ^)=32 lines

I was looking at something similar like "Rotary Quadrature Decoder" TIDA-00580 (collect the incremental data to some counters and take diskrete values via i2c or spi to e.g. an fpga/microchip), which would solve the issue.

"Rotary Quadrature Decoder" TIDA-00580 may not work for my application because of missing validation step. E.g. system is standing still between two positions and is "vibrating", those should be cases not for the counter. Not sure whether there are more efficient ways to collect these kind of signals efficient to an e.g. FGPA (~30-40 cm distance)

  1. I am open for different solutions which reduce the amount of necessary lines by at least a factor of e.g. >= 2
    1. serialization, might be possible but needs translation 
    2. decoding the signals, like with TIDA-00580 might work for some extend
    3. other?

Many thanks for your time!

  • 0
    TI__Guru* 96681 points
    Hi MSH and welcome to the E2E forums!

    You might not know that this forum is primarily intended for technical assistance with using TI parts. I can tell you that there aren't any TI devices designed to do this in particular - which I hope isn't surprising considering the rather custom nature of your system.

    It sounds like you have the basic idea of how to accomplish the system design - I will certainly leave the thread open for any community members to post ideas, but generally I think you'd get a better response on a forum like Reddit or Slashdot for a generic design question like this.

    If you want to know how to do this with TI parts that exist today, I will need to know details like the voltages available in the system and the bit rates of the incoming data. I will have to also get a better definition of "merging" the data -- what does the end product look like? Do you need a bit stream to transmit via a radio, or are you loading the data into a processor?
  • 0 in reply to Emrys Maier
    Prodigy 20 points
    No, problem. I was hoping that this issue can be solved elegant using some ti ics, we are using them for differnt purposes thats why i am here. The problem seemed to me so fundamental, that i thought there is a simple hardware solution for that.

    Concerning the forums: Thank you for your advice, i really appreciate it.

    to: "I will need to know details:"
    - voltages available in the system
    => sensors are mostly powered via 3,3 or 5 VDC, 24VDC is main supply

    - bit rates of the incoming data;
    => each encoder might mave an outputrate of 20 Megastates/s

    - better definition of "merging" the data -- what does the end product look like?
    => one collector board which takes all the data alltogether on pcb and via cable to another pcb with fpga
    if making all signals from encoder to same standard e.g. differential, it would be for the amount of encoders i have ~40-70 signals lines from that board (collector) to another one (fpga); a cable is highly prefered for powering, and reliable communication
    (the collector board is a moving part)
    So i just try to reduce the amount of wires, thats what i meant with merging

    - Do you need a bit stream to transmit via a radio, or are you loading the data into a processor?
    => to stream the data into an fpga and to a processor

    Again, many thanks for your feedback i appreciate it and will follow your advice.
  • 0 in reply to MSH
    TI__Guru* 96681 points
    Hey MSH,
    That's quite a bit of data that you're sending!

    I can see why you'd like to keep it in a differential format - transmitting over a cable at high data rates typically requires differential signalling.

    My group (Standard Logic) typically deals with basic single-ended logic devices. Things like the SN74HC165 -- a parallel in/serial out shift register. The 'HC165 has a max frequency around 50 MHz, and probably wouldn't help you out all that much.

    You might try asking in the SerDes forum. I know that FPD-Link is really popular for automotive applications requiring a large amount of data being serialized and sent through a vehicle: www.ti.com/.../overview.html

    Sorry I'm not more help.