Other Parts Discussed in Thread: UCC28700
In the output voltage measured across TP3 and TP4 there is a ripple of about 12V. It ranges from 57V to 45V. Also at the Secondary2 of T1 the voltage is varying from 3.6V to 0V. There is an off time of around 500ms. I think the UCC28700 is going into Undervoltage Lockout (UVLO) condition. All the values and parts are unchanged from the original reference circuit (PMP20199).
In the UCC28700 datasheet the recommended value for CVdd (C14) is 0.047uf to 1uf and according to my calculations RLC (R5) should be 2.89kOhms.
Please also let me know what will happen if I make the following changes to the circuit:
1. Make C14 = 1uF.
2. Change R5 = 2.87kOhms
3. Change value of R3 from 30.1k to 75k.
Please suggest how I can debug this board.
Thank you in advance.