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TINA/Spice/SN74HC04: HC Series Hysteresis

Part Number: SN74HC04
Other Parts Discussed in Thread: TINA-TI

Tool/software: TINA-TI or Spice Models

Hi,

I noticed that when using the TINA-TI HC series models the input on all the family devices do not show any significant hysteresis. According to the data sheets the HIGH level should be ~ 30% below VCC and LOW should be ~30% above GND.

The attached .TSC shows 3 simple gates demonstrating switching with just 33.4mV delta on the inputs, around the transition point. This makes the models unrealistic, particularly where RC timing circuits are employed. Even by selecting Linear or Non-Linear transfer characteristics they do not seem to observe the HC family definitions.

I recognise that the values in the table above are defined at 5V Vcc, however the models seem to offer a very very small noise margin way less than what is expected. 

Do I have outdated models, or am I mistaken?

All the best

Aidan

HC_Series_Hysteresis.TSC

  • Aidan,

    The logic devices you mentioned are ideal devices embedded in TINA-TI.
    They don't necessarily reflect the specs in actual device data sheets.

    You can modify those models by first double-clicking on the symbol, and then editing the fields in the Properties pop-up window.
    For example, you can change the delay by double-clicking on the pop-up's Catalog field and entering the desired values (in seconds) in the Catalog Editor's two Delay fields a shown below.

    Similar changes can be made in the DC Transfer, Input, and Output fields by clicking on the field and then selecting an entry  that field's pull-down menu.

    I hope this helps.
    Please let me know if you have any questions.

    Regards,
    John

  • Thanks John,
    Actually I had not looked at the delay settings, interesting. However not that useful for my purposes.
    I don't think there is much that you can suggest with the built in models.
    Its not timing in terms of propagation delays as you might expect in a high speed circuit. Rather I am using some simple combinatorial logic to control some power sequencing. I just wanted to create some simple edge triggered mono-stables and similar stuff where timing is determined by RC networks and transition levels of the gate. It makes quite a difference and of course leaves very little room for noise when the high to low transition is so critically close.

    I mean, it works for sure, but no doubt the overall timing will be out of kilt and I'm currently having to guess at the more likely behaviour.

    One technique I wanted to try, was to front the gates where these transition levels are critical, with a schmitt trigger. However I don't find any HC series schmitt devices built in to TINA.

    Maybe you could suggest a logic device that has schmitt inputs that I can insert where needed and might allow me to get a better representation of the LC series. Even a simple macro that exhibits schmitt behaviour. I briefly tried building one myself, and got a little way with it, but I wanted to expose the Vcc voltage as a variable as schmitt thresholds would change accordingly. Instead I went back to the rest of the design.

    Maybe you could help.

    None of my timing is any more than uS critical, and much is even an order of magnitude slower. So this is not going to clash with high speed propagation.

    Could you suggest something?
    Thanks again
    Aidan
  • John,

    I simply stuffed this in front of any gate that required the 'correct' behaviour:

    All the best

    Aidan

    Schmitt_Trigger_Input.TSM