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WEBENCH® Tools/TPS55340-Q1: Webench Board Layout problem

Ralph Grohmann
Prodigy 90 points
Part Number: TPS55340-Q1
Other Parts Discussed in Thread: TPS55340

Tool/software: WEBENCH® Design Tools

Hi

This is my first time working with Webench.

I created a design with the TPS55340-Q1 and would like to make a PC board but there are a few conflicts.

Looking at the WebTherm Simulations, D1 is incorrectly oriented on the board. Also the Board Layout from the cad file export

area is also incorrectly oriented and missing solder pads even if it would be rotated. In Cadsoft Eagle software the top placement layer

as well as the bottom placement layer have been removed so I am unable to alter the board myself.

I have not been successful in being able to talk directly to a TI support person. Does anyone know

of the path I should take to get this resolve so I can proceed with my project.

Thank you

Ralph

  • 0
    Prodigy 60 points

    Hi Ralph,

    Thanks for choosing WEBENCH.

    Could you please let us know the input parameters(Vin min, Vin max, Vout, Iout) used to create the design? And the part number of D1 in the created design?

    Regards,

    Vasudha Bhat

  • 0 in reply to Vasudha Bhat
    Prodigy 90 points
    Hi

    Here are my parameters.

    Vin min 3.5v
    Vin max 7.4v
    Vout 9.4v
    Iout 1.5
    Efficiency 91%


    D1 MBRB2515LT4G
    L HC1-7R8-R


    I'm assuming they boards and circuits have been tested and are sound.
    I've made a few designs and the basic board concept is the same so i believe
    TI is using a proven design. Do you know anything in the contrary?

    Also I would like to tighten up the open areas especially the left side of the board
    because the foot print I have is a little smaller. Do you have any advice and information
    how the change may effect the circuit?

    Thank you for your assistance.

    Ralph
  • 0 in reply to Ralph Grohmann
    Prodigy 60 points
    Hi Ralph,

    Thanks for the inputs.

    Diode orientation issue is fixed now. D1 MBRB2515LT4G can be used in the design.
    Yes, All the designs and circuits on WEBENCH are tested and verified.

    Regarding the board size modification/copper area modification, We will get back to you on that, whether there will be effects on performance of the circuit or not.

    Regards,
    Vasudha Bhat
  • 0 in reply to Ralph Grohmann
    TI__Mastermind 40080 points

    Hi Ralph,

    Did you have a schematic so that I can help to check it ?

  • 0 in reply to Vasudha Bhat
    Prodigy 90 points
    Sorry had to step away from this project for a bit. Now I'm back.

    Thank you for correcting the Diode.

    Waiting to hear about the copper area modification.
  • 0 in reply to Helen chen
    Prodigy 90 points

    webench_board_exchange_design_5812224_9_Eagle.zipwebench_board_exchange_design_5812224_9_Eagle.zipThe schematic was generated from Webench.

    Would you know if there would be performance issues if the core circuit

    was not disturbed but the outer copper are would be tighten up to

    fit my small footprint I have for that circuit?

    Thank you

    Ralph

  • 0 in reply to Ralph Grohmann
    TI__Mastermind 40080 points

    Hi Ralph,

    Could you please attached the sch in pdf file, I can't open your file.

  • 0 in reply to Helen chen
    Prodigy 90 points

    Ver 4 TPS55340.pdf

    This is the info generated by the webench.

  • 0 in reply to Ralph Grohmann
    TI__Mastermind 40080 points

    Hi Ralph,

    The schematic is OK . So what is your aim of this post, you want to make a compact solution based on TPS55340? If it is, then I suggest you use smaller packaged diode and inductor, the efficiency will be lower, but the size will be much smaller.

  • 0 in reply to Helen chen
    Prodigy 90 points

    The PC board generated by webench is a little large for our project.

    I've read that the positioning of the components around the TPS55340

    is critical for it operation. I would like to tighten up the left side and

    bottom of the board but i don't know how that will effect the circuits stability.

    The core circuitry around the TPS55340 would not be touched.

    I would appreciate your thoughts on this.

    Thank you

  • 0 in reply to Ralph Grohmann
    TI__Mastermind 40080 points

    Dear Sir,

    Please use smaller package component.

    1. Please change output diode to a smaller package one, like  MBRA210L;

    2. For the output cap, please use smaller size, use 2-3pcs 22uF/1206 size ceramic  cap, and place it near to the IC. The current Cout is too far away from the IC.

    3. Move all the component down, just  left a narrow GND return path at the top layer. Adding more vias at the input and output side, so that the main current can also return through the inner layer. Pour a whole GND copper plane at the inner layer.

    I add some notes based on your placement. Please check the attached file.

  • 0 in reply to Helen chen
    Prodigy 90 points
    Thank you for your input.

    I do not see any notes on my placement just a web site.
    Would love to see tour notes.

    I just noticed that the capacitor Ccomp is not even connected on the webench generated PC board
    which i sent you in the previous post.

    Very disheartening.
  • 0 in reply to Ralph Grohmann
    Prodigy 60 points

    Hi Ralph,

    I have taken the same EAGLE file which you have attached in the previous comments and Ccomp is connected in the board.

    Please let us know if there is any query regarding this.

    Regards,

    Vasudha Bhat

  • 0 in reply to Vasudha Bhat
    Prodigy 90 points

    Sorry I got my files mixed up.

    That was corrected when the diode problem was corrected.

    The image you sent is very interesting.

    This is what I see with all layers turned on. For instance layer 23-24 tOrigins/bOrigins

    are not there yet I see the component center cross hairs on yours. If I try and move the component

    the program crashes. Layer 25 in the eagle program should be tNames but its tPlace and there no

    information that I can see so I see no Names. I look at the drawing XML file and the drawing file itself and I

    find the information is there in the elements section but the layer section is not the same format as compaired

    with the file I made new with eagle.So when I try to make gerber files I get a very poor result.

    I am using the standard Eagle Autodesk progeram which is good for 4 layers.

    I am new at making PC Boards so I contacted AutoDesk and they agreed with my findings.

    I started this project knowing I will have much to learn but when I came across

    Texas Instruments Webench and thought this would help in my  journey.

    At the beginning I sold my managers on TI but now seeing the problems I'm having they

    don't have the confidence that the circuit is even going to work.

    So if possible can I speak to someone on the phone in order to get back on track.

    Thank you

    Ralph

  • 0 in reply to Ralph Grohmann
    Prodigy 60 points

    Hi Ralph,

    1. Regarding tOrigins and bOrigins, You need to run ulp(File->Run ulp) as shown below to get the component origins and layers tOrigins and bOrigins.

     

           2. After running the above ulps, tDocu(Layer 51) will display all the component names on the board file.

    Please let us know if there are any more queries.

    Regards,

    Vasudha Bhat