PMP12072: Q1 Q2

Hi,

The drive to transformer T1's input (between C1-left and T1-6) is a 50% square wave voltage between zero and a positive voltage. An AC voltage is applied across T1-primary because C1 blocks the DC and prevents possible transformer saturation. The secondary side alternately rectifies this AC voltage through each diode of D1. In other words, while winding T1-4/5 conducts the top diode of D1, the bottom diode of D1 is reversed bias because winding T1-3/2 output voltage is negative (note the transformer's dot phasing). This then repeats for the negative phase of the input voltage (T1-3/2 conducts through the bottom diode of D1 and the top diode of D1 is reversed biased). During each conduction cycle of D1, C1 charges to the transformer's secondary voltage. The voltage across C1 is a constant (non-switching) DC voltage. R4 allows this voltage to discharge when switching stops. 

Q1 and Q2 require a voltage from gate to source to turn on. The DC voltage across C1 turns the FETs on as long as the primary side is switching. When the primary side switching is disabled, C1 is no longer charged (R4 discharges it), turning off the FETs. The FETs conduct  bi-directionally as long as switching is present and behave similarly to a solid-state relay.

I hope this helps.

regards,

John Betten

C2 - NOT C1 (maybe I should slow down a bit)