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TIDA-01471: Synchronize multiple IEPE Interfaces

Patrick Oetken
Prodigy 190 points
Part Number: TIDA-01471
Other Parts Discussed in Thread: ADS127L01, ADS1274, ADS1278

Hello,

we want to use more than one TIDA-01471 to read multiple IEPE sensors simultaneously. At the moment we have six boards connected to the Controller board and the DRDY line of one of the TIDA-01471 is used to start reading data from all ADCs via SPI. The data transmission works fine, but after a few seconds the DRDY signals are asynchronous and we need to resync the ADCs to prevent data loss.

We tried to send a stop command followed by a start command, but this causes a delay time of about 2.7 ms before the next DRDY signal (with 32kSPS). According to the ADS127L01 datasheet, this delay is caused by the wideband filter used by default in this design.

Is it possible to switch to the low latency filter instead of the wideband filter without modifying the layout? The delay should be around 20 us using the low latency filter, which seems acceptable.

Or is there another way to synchronize the ADCs?

Thanks a lot,

Kind regards

Patrick Oetken

  • 0
    TI__Expert 5120 points

    Patrick, thank you for your interest in Texas Instruments' Reference Designs. Your inquiry has been forwarded to our Industrial Factory Automation team that owns this design.  The design team in Freising, Germany and currently the team is already gone for the weekend.   Please give the team until Monday at the earliest to respond to your question here. 

    Again, thanks for your interest in Texas Instruments. 

    Best Regards,

    John Fullilove

  • 0
    TI__Expert 3500 points

    Hello Patrick,

    Thanks for reaching out, interesting application indeed.

    - I forwarded the request to the product line, who are better suited to comment on the ability to synchronize ADS127L01.

    - I understand you want to test the concept with the existing TIDA-01471 with little or no changes, but I also recommend for multi-channel applications to have a look on ADS1274 (4-ch) , and ADS1278 (8-ch) which lead to more optimized design in that case.

    - switching to low latency filter would hit the bandwidth (check figure 65 vs. figure 71 or 72) so unless your input bandwidth is limited this would change the spectrum. but if you want to do that anyway, you can remove R23, and R21 that connects FILTER0, and FILTER1 to DVDD and GND respectively, and bluewire the pads connected to FILTER0 and FILTER1 to GND and DVDD respectively (reverse to the original connection)

    Best Regards,

    Ahmed

  • 0
    TI__Expert 3500 points

    Hello Patrick,

    ADS127L01 in parallel can be synchronized by START pin if they are sharing the same CLK as in the figure below. this is detailed in section 8.4.3 in the datasheet.

    Note that in TIDA-01471 the START pin is kept low and not used in signaling, also if you are using separate boards, then CLK signals are independent for each converter.

    Now the question is: How you can do this connection with the existing boards?

    I would do the following:

    1. Get a clock buffer EVM to support driving the six boards, something like this

    2. disable clocks in all boards , by shorting J10 jumper

    4. connect the input of the EVM to the 8 or 16MHz source, connect the 6 outputs of the EVM to the 6 boards clock input at R8 terminal, connection should be as short as possible, if single wires are so distorted, try to connect for each clock both CLK, and GND using a twisted pair. this is the trickiest part as so much distortion or noise on these connections would get away with what we are trying to achieve. you can also change C11 or R8 if needed to reduce clock distortion at the input of the ADCs 

    5. I would keep the START shorted if no change is needed.

    I would start by connecting the clock of two boards and see if things are working as expected.

    let me know if you have any updates.

    Kind Regards,

    Ahmed

  • 0 in reply to Ahmed Noeman
    Prodigy 190 points

    Hello Ahmed,

    thank you for your reply.

    we already disabled the clock for 5 of the 6 boards using J10 and used TP7 to share the clock of one board to all six boards. Until now it seems to work fine, but we did not check the noise/distortion.

    Are there any similar designs for the ADS1278 or ADS1274 you can recommend instead of the TIDA 01471?

    Kind Regards,

    Patrick Oetken

  • 0 in reply to Patrick Oetken
    TI__Expert 3500 points

    Hello Patrick,

    Thanks for the update. Good news!

    At the moment we don't have TI designs dedicated for those devices, but the front-end of TIDA-01471 can be reused for any of those devices as they share the same input stage with ADS127L01.

    If the synchronization issue is solved by now, may I ask you please to close the issue as marking one of the replies to as resolving the issue.

    Kind Regards,

    Ahmed