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CCS/TIDA-060001: boostxl afe031 for Power Line Communication

Part Number: TIDA-060001
Other Parts Discussed in Thread: AFE031, BOOSTXL-AFE031-DF1

Tool/software: Code Composer Studio

I'm using the resources of ‘SunSpec Rapid Shutdown Transmit and Receive Reference Design TIDA-060001’ for Power Line Communication applications. I used the design files to make the PCB of the circuit and weld all the corresponding components, however, after making tests with the software boostxl_afe031_f28379d_dacmode and boostxl_afe031_f28379d_pwmmode there’s no data in the output of the board.
The polarity, phase, and frequency of the clock (CLK) have been modified, all the gain values from the guide have been used and I’ve written on the registers but there’s no way to read them back so it’s not possible to know if they are modified correctly. The main GPIOs ‘mode select’ and ‘system shutdown’ are set LOW as indicated in the pdf document.

I would like to know what other tests, modifications or additions we must do to obtain the data in the output of the board.

  • Hi User,

    Our PLC expert (https://e2e.ti.com/members/6176143) has looked into this, please see his reply below:

    _________________________

    I assumed that you are using BOOSTXL-AFE031-DF1 Rev A board, see the attached User's Guide: http://www.ti.com/tool/BOOSTXL-AFE031-DF1

    Although I am not fully understanding what your exact issues are, I am assuming that you do not see Transmission or Receiving signals at Power Amplifier’s output pin 42 (PA_OUT2) and Pin 43(PA_OUT1). Here are possible root causes:

    Possible Issue 1:

    Please check the voltage states of Pin 47 and Pin 48.  They should be pulled high or in logic high. This is documented in AFE031 datasheet, see the requirements on the bottom of p. 39 in the link below. http://www.ti.com/lit/ds/symlink/afe031.pdf

    Possible Issues 2:

    The polarity, phase, and frequency of the clock (CLK) have been modified, all the gain values from the guide have been used and I’ve written on the registers but there’s no way to read them back so it’s not possible to know if they are modified correctly. The main GPIOs ‘mode select’ and ‘system shutdown’ are set LOW as indicated in the pdf document.

    In Table 10, Command Register on p. 41 of the AFE031 datasheet, you need to enable R/W bit in Bit 15, where 1=Read and 0=Write. Please make sure that you configured the bit 15 correctly via SPI command.

    If you have any other issues, please let us know. I will help you to answer questions and resolve these issue.  

    Best,

    Raymond