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PMP12082: Different Input and Output Required

Part Number: PMP12082
Other Parts Discussed in Thread: UCC28730, PMP10415, UCC28700, UCC28740, TIDA-00173, UCC28742, PMP22144

We are in need to develop Isolated DC-DC converter with below specifications
Design-1
1) Supply Range: 100V-1000V DC
2) Output 5V at 1Amp
Design-2
1) Supply Range: 100V-1500V DC
2) Output 5V at 2Amp 
I was looking into TI website and came across a similar design i.e. PMP12082.
This design is closely matched with our requirement, exception is its output rating.
Would you be please kind to provide a few design changes to incorporate our requirements?
  • Hi Gaurang,

    For this high of an input voltage I would recommend using a SiC FET instead of the cascode configuration with 2x Si FETs.

    PMP10415 shows how a QR flyback controller can drive a SiC FET directly with no issue. That design uses UCC28700, but I have used UCC28730 for the same topology.

    The power stage will more resemble PMP12082, but with a single output. I recommend using the design calculator under the Design tools & simulation section of the devices webpage to verify any design calculations.

    From my calculations the turns ratio (Pri : Sec) = (38 : 3), primary inductance of 800uH, and Rcs = 1.25 Ohm should be fine for the design 1 option. The rectifier diode will have more stresses so i would recommend increasing the rating on that device.

    The input for design 2 is a little more tricky. With that wide of an input range the duty cycle gets very narrow for the maximum input voltage case. When this occurs you risk having an on-time too close to the leading edge blanking time. To account for this dropping the switching frequency is the simplest option. This can be done by using the same transformer specs, but decreasing the Rcs to 1 Ohm. If you want to keep the frequency higher ~50 kHz you will have to change the turns ratio.

    Let me know if you have a further questions on this.

    Thanks,

    John

  • Hello John

    Thank you for your response.

    I can see that Output regulation is carried out on the Primary side. I wonder how much will be the regulation?

    Apart from that, you have suggested using a single Switch Instead of cascading 2 switches, any specific reason for this? I need to consider overall dimension of the DC_DC converter, hence smaller the devices the better our DC-DC will be.

    We need good regulation which I think can be achieved by Optical feedback.

    I wish you could share the complete design or similar design with better regulation.

    Thank you

    Regards

  • Hi Gaurang,

    This will depend on the accuracy of the transformer, but the expected output tolerance is 5%.

    If size is a constraint a single SiC switch will be better than a two switch using Si. Additionally, I have found a HV SiC will be less lossy compared to a pair of Si FETs. This reduced power loss will make a compact design easier to achieve.

    If 1% regulation is needed i would recommend using UCC28740, which can be controlled with secondary side regulation. The DRV signal is clamped to 14V, so care will have to be taken when deciding on the SiC FET.

    I do not have a similar completed design to show at this time.

    Thanks,

    John

  • Hello John

    Thank you for your suggestion.

    In that case, please be kind to help me chose the correct SiC Fet, and please help me out for the transformer design calculation for our requirement.

    I want to see both the options i.e. Primary side regulation and Secondary side regulation. Hence it would be great if you help me out to find suitable calculations for UCC28740.

    Regards

  • Hello John

    I hope you are doing well.

    Please respond to my queries.

    Can you please help by providing calculations to move further on my requirements.

    Regards

  • Hi John

    The other thing is, atleast let me know one device to chose from various devices so that I can start studying on it.

    Regards

  • Hi Gaurang,
    Sorry for the delay, per your questions:

    For design 1, the max nominal stress on the FET will be ~1063V (assuming the transformer specs from earlier). There will also be some additional voltage ringing. Looking on digikey, most SiC FETs go from 1.2kV to 1.7kV rating. There may not be enough margin with the ringing to handle 1.2kV, so I suggest a 1.7kV device. Next the FETs can be narrowed by their figure of merit. That is, balancing cost with the varous loss mechanisms. However with the input voltage being so high, a lower cost options with higher RDSon would suffice. There are a few options like SCT2H12NYTB that have 1.5 Ohm RDSon, but very good switching characteristics.
    For the transformer I recommend using the calculator on the UCC28740 or UCC28730 product page. This is located in the "Design & development" section and select "Design tools & simulation". The calculator can help determine the ideal inductance and turns ratio. Do note that turns ratio (Pri : Sec) = (38 : 3), primary inductance of 800uH, and Rcs = 1.25 Ohm, should be fine.

    For design 2, that higher input voltage will be tricky. I think you will need a cascode configuration, similar to PMP12082 for the primary FETs. If a similar turns ratio from design is used the nominal stress will be at least 1563V, with added ringing. A 2kV FET will be very lossy and expensive so I would recommend a pair of either 950V or 1kV rated FETs. IPN95R1K2P7ATMA1 would be a device to consider.
    Again for this design the device calculators will be a great resource for testing different turns ratios and primary inductances for your transformer. They also calculate the current stresses to give more information on transformer construction.

    To clarify, UCC28740 is optimized for secondary side regulation and UCC28730 is optimized for primary side regulation.

    Thanks,

    John

  • Hi John

    This clarifies most of my doubts.

    I will choose UCC28740. I will work on the calculations and will share the results to you.

    One thing will remain open that is driving HV pin. I think, driving HV pin based on TIDA-00173 and PMP10415 would be OK. These designs use a typical Zener Voltage clamp circuit on HV pin.  Please see image in this thread.

    Please be kind to suggest on that. Once that is done, I can move forward on calculating the overall cost and then I can decide where to optimize the cost based on schematic and components I choose.

    Regards

  • Hi Gaurang,

    Correct, the HV pin has an absolute max rating of 700V. One option is to have a zener to prevent the pin from having too high of stress. 

    The other option is to connect the HV pin to the midpoint of the input caps. PMP22144 has an example of this, but using UCC28742 for a controller. Because the voltage is kept balanced (or close to) with the series, R-C in parallel components, the voltage that goes to the HV pin is only half the input voltage. For the 1 kV input case there will not be risk of damaging the HV pin.

    Thanks,

    John