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TPS7A03: TPS7A0333PDBVR have leakage voltage

Part Number: TPS7A03
Other Parts Discussed in Thread: TPS737, TPS7A45

Dear Sir/ Madam,

I have some issue with LDO (TPS7A0333PDBVR) regulation to 3.3V. Could you please see circuit from attached file.

I turn off P-MOSFET by send high logic at C point and A point connect battery around 0.05V (measure before insert to HOLE3 and HOLE4) but when I try to measure at A point have voltage across around 2.1V (through the LDO out to LDO in).

So, please suggest about below circuit, how to improve for that can worked? and why have voltage leakage through the MOSFET (I turn MOSFET it off) and through LDO?

 

  • Hello Nonthaphat,

    When the Q101 gate is pulled high, the PFET is turned off however the 3.6V source is flowing through diode D1 and through the body diode of Q101.  The TPS7A03 does not have reverse current protection, so any prebias applied on the output of the LDO will charge up the input capacitor via the leakage path through the internal pass element.  

    If you need an LDO with reverse current protection, please let us know your design requirements (Vin, Vout, Iout, temperature range, and any other specific requirements you would like us to consider).

    Thanks,

    - Stephen

  • Hello Stephen Ziel,

    When 3.6V point supply,

    3.6V point: 3.6V

    Iout (3.6V point) max: 50mA

    Vcc: 3.3V

    V gate (C point): 3.3V (high)

    When 3.6V point don't supply 3.6V,

    Vin (A point): 3.6V

    Vout (B point): 3.3V

    Vcc: 3.3V

    V gate (C point): 0V

    Iout (B point) max: 20mA

    Temperature range: -40 - 70 C 

    Thank you very much for your support,

    Best Regard,

    Nonthaphat

  • Hi Nonthaphat,

    Try looking at the TPS731xx, TPS732xx or the TPS736xx which look to be a drop in replacement for your design.  I would probably choose the TPS731xx first due to the low dropout voltage.  Other options include the TPS737 and TPS7A45.

    Also, you may wish to modify your circuit to remove the Q101 body diode path.  Instead of placing a PFET (Q101) as shown in the schematic, you may wish to place an N-channel MOSFET on the EN pin of the LDO.  Use a large resistor value such as 10k ohms from Vin to Ven, then place the drain of the NMOS on Ven and the source of the NMOS on GND.  You can then command the LDO on and off when you wish to power "Input MCU" by a different source. 

    Thanks,

    - Stephen