This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

PMP8740: SS/EN Mosfets

Part Number: PMP8740
Other Parts Discussed in Thread: UCC28950, UCC28951

Hi team , 
I'm make a design like in the pmp8740 
There is something I want to understand here on the SS/EN pin , two mosfets are used here. How will the controller , structre and the ENA_FB.P4 pin act? can someone explain me in details please?
Can i use a one NPN transistor instead of these two mosfets. like in the second figure below.

Thank you team.

Best Regards,

Mikail

  • Hi Mikail,

    As you know, the PMP8740 has been designed to be controlled / supervised by a microcontroller.

    It's also flexible to host different microcontrollers, by replacing and use the daughterboard (which is placed vertically on a separate connector).

    Now, during startup, or if the micro is stuck in an undefined state, it can happen that the digital output (ENA_FB P4.7) is stuck in tri-state mode. That means, if you use only one BJT, like in your schematic, and the digital output is in three-state, the SS/EN pin will be released and the DC/DC converter will be enabled.

    Maybe you have a different micro that starts with its digital output always with 1 logic, which keeps the DC/DC disabled.

    Best regards,

    Roberto

  • Hi Sır , 

    Hımmm.. Can i ask one more question ?


    1-Well, how do you do the control here? So, In which case do you give high or low to the (ENA_FB P4.7) and according to what?
      
    2- I do not know if  I understood the working principly correctly but if I'm wrong, can you please tell me the right one? so

    - First case  when (ENA_FB P4.7) pin is set to high , the Q3 will conducted and as the result , we cut off the VCC_FB voltage and  turn of the Q1 and hence ensure the SS / EN capacitor will also discharged to ground.

    - Second Case when (ENA_FB P4.7)  Pin is set to low. the Q1 fet will also conducted because it is fed from 12V supply but here is a strange thing in this case the capacitor is grounded by Q1 but  it will be at a constant average voltage of 4.65V(in normal operation) since it is also powered in VCC_FB?

    I'm ı true?


    If I am wrong, can you please tell me what the right working principle is?

    Best Regards, 

    Mikail

  • Hi Mikail,

    You can find more details, about when and how to enable the DC/DC stage of the PMP8740 in the white paper of this design, available in the technical documentation, in the UCC28950 product page.

    The link is as follows:

    Now the answer to your questions:

    If you set the signal ENA_FB P4.7 high, Q3 will be on, therefore almost a short circuit. If Q3 is now low-Ohm value, the gate-source voltage of Q1 will be ~ zero, therefore Q1 is open (high-Ohm), and the soft start phase is released. Then internal current source of the UCC28951 is now charging C8 up to its steady state value and the DC/DC stage is on.

    On other hand, if ENA_FB P4.7 is low, Q3 will be off and the gate-source voltage of Q1 will be equal to VCC_FB. This switches Q1 on, and shorts the capacitor C8 so that the voltage on SS/EN pin remains zero, and the DC/DC stage remains disabled.

    Please let me know if that answers your questions.

    Best regards,

    Roberto