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TIDA-00195: what is the benefit of parallel Capacitor in GE ?

Part Number: TIDA-00195

hi everyone 

good day!

in TIDA-00195 the parallel Capacitor in GE (C142,C71,C55,C38,C153,C164) are used to reduce the amount of inducted voltage at the bottom IGBT.

the question that comes to my mind is that using parallel capacitor in GE does not effect on rising and falling time ?

let's assume that we are using IGBT with input capacitor of 10nf in GE,and in addition we have 10nf parallel capacitor in GE .

 

question 1:
  the amount of draw current become doubled. and the rising and falling time increase am I right ?

 

question 2: by these unfair effects what is the benefit of using parallel Capacitor?

 

please explain more to understand about the benefit  of it.

thanks for attention .

Dave

  • Hi Dave, 

    Thanks for contacting the E2E! These capacitors are not necessarily present. The schematics has them in case it is needed. They have multiple purposes:

    • reduce the relative effect from the Miller capacitance
    • on purpose reduce the the rising and falling time to what is needed to pass EMI regulations
    • stabilize the propagation delay and make it independent from load

    The gate drivers are designed to drive large capacitive load and with the individual output resistors and the parallel caps you can trim rise and fall times as well as the load dependency of the propagation delay. It is essential to prevent the shoot through of the half-bridge independent of the load attached..

    Does this cover your question sufficiently? I'll keep the thread open just in case.

    Kind regards, Ingolf

  • dear Ingolf

    question 1:if I use a parallel 10nf cap  along with GE(gate input cap =10nf) it will draw current 2 times more?

    Question 2: as you said

    • reduce the relative effect from the Miller capacitance :do you mean it will help to shorten the rising time(on time)?

    question 3:
       sorry I could not get your point !

    • on purpose reduce the the rising and falling time to what is needed to pass EMI regulations : what do you mean?

       

           as far as I know Having two cap in parallel, make charging time and discharging time to be doubled . and it drawing current is also  become doubled.

              which both of them are harmful for switching .please correct me if I am wrong...

              how this parallel cap can reduce the the rising and falling time  ?

    question 4: 

    • stabilize the propagation delay and make it independent from load :you mean by drawing current rising time and falling time will increase but if we put the parallel cap can stabilize the propagation delay  ? is that what you mean?

    Dave.