any update for the Equation 2 issue?
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I believe there are mistakes in that documentation. I think I have located the original designer and checking with him what I believe to be the needed corrections.
Hi Kenneth,
In order for the secondary path to turn on, both Q3A and Q3B must turn on so the path from Vsec to VOUT is established. How long will it take depends on the voltage (Vx) shown below. The fundamental equation for a PMOS to turn on is VSG > VTH. For the sake of argument, in order for Q3A and Q3B to turn on, Vx needs to be VSG + (I*R6) + voltage drop of the schottky diode (BAS40W-05-7-F) we will assume that it is just -2VTH.
The voltage equation for an RC time constant is V(t) = Vo*(1 - e^(-t/RC)). The goal is to calculate the time it takes for the two PMOS devices (Q3A and Q3B) to turn on. If we set V(t) = 2VTH then we can solve for time (t). See below:
-2VTH = Vo*(1 - e^(-t/RC))
What are the values of Vo, VTH, R and C? Vo is the voltage Vsec* (R8/(R6+R8)) or Vx. VTH = -2V (typ) seen in the PMOS datasheet. R is the resistance seen at Vx and looking at the schematic, R = (R6||R8). C is the capacitance looking at the gate of Q3A PMOS device. To obtain VTH and C, you would need to look up SI3993DV-T1-E3. Looking at the datasheet for the PMOS device, the gate capacitance (Ciss) at a VDS of 3.6V is around ~240pF. Why 3.6V? The secondary voltage is 14.4V. The secondary voltage is applied when the primary voltage UVLO setting is at 10.8V.
Working out the equation and solving for (t):
t = -[(R8*R6)/(R6+R8)] * (Ciss) * (Ln(1+(2VTH/(Vsec*(R8/(R6+R8))
t = -(249.5k)* (240pF) * (Ln(1+(2*(-2V))/(14.4V*0.5)
t = 48.56us
I hope I have answered your question.
Ben