Simulation, hardware & system design tools forum - Recent Threads

AM261X-MCAL-SDK: Need IBIS model for DS34LV86TM

Juli Olenick — Wed, 01 Jul 2026 19:57:24 GMT

Part Number: AM261X-MCAL-SDK

Need an IBIS model for your part number DS34LV86TM/NOPB-SNPB.

Your form would not find the part number that I needed so I just entered some random part number in order to get this sumbitted.

UC1843A-EP: ESD class and SPICE model for UC1843AMDREP

Adam Shiau — Thu, 25 Jun 2026 08:54:45 GMT

Part Number: UC1843A-EP

Hi TI team,

I'm looking into using the UC1843AMDREP and have a couple of quick questions.

I checked the reliability report and noticed it mentions ESD-HBM results, but I couldn't find any specific ESD details in the datasheet itself.

Since this is for a high-reliability design, we just want to make sure if this part happens to be ESD Class 0.

Also, is there a SPICE model available for this specific part number?

Thanks for the help!

Best,

Adam

RE: UC1843A-EP: ESD class and SPICE model for UC1843AMDREP

John Gomez — Wed, 01 Jul 2026 19:03:34 GMT

Hi,

The qualification follows the JEDEC standard, EIA/JESD22-A114.

That standard is linked below:

http://www.esd-resource.com/userfiles/2011-05-20/201105200647101.pdf

Thanks,

John

SN54SC6T17-SEP: No IBIS models for any level translators

Mark Bryant — Mon, 29 Jun 2026 21:12:02 GMT

Part Number: SN54SC6T17-SEP

I scanned through multiple level translator options, but found not a single IBIS model. Why are you not providing IBIS models automatically, and requiring me to request them?

RE: SN54SC6T17-SEP: No IBIS models for any level translators

Jack Guan — Wed, 01 Jul 2026 14:50:33 GMT

Hi Mark,

We are still looking into this and will follow up shortly.

Regards,

Jack

TPS7H4003-SEP: SIMULATION TRANSIENT MODEL

Ajith Kumar M — Wed, 01 Jul 2026 10:32:40 GMT

Part Number: TPS7H4003-SEP

I AM USING THIS MODULE IN MY SPACE PROJECT. I NEED TO CHECK THE SIMULATION FOR THIS MODULE. WE DONT HAVE PSPICE LICENCESES VERSION SO CAN YOU PLEASE PROVIDE THE LTSPICE OR TINA TI SPICE TRANSIENT MODEL.

RE: TPS7H4003-SEP: SIMULATION TRANSIENT MODEL

Sarah Koch — Wed, 01 Jul 2026 14:08:57 GMT

Hello,

The PSpice model file download contains a SPICE netlist (.lib file) that can be imported into any SPICE-based simulator. You can either use this file outside of PSpice or download PSpice-for-TI for free.

Thanks,

Sarah

RE: TPS62160: SPICE Model of TPS62160QDSGRQ1

Vidhi Sharma — Wed, 01 Jul 2026 13:18:29 GMT

Hi Hammad,

Please find the attached spice model.

e2e.ti.com/.../slvm428b.zip

TPS62160: SPICE Model of TPS62160QDSGRQ1

Hammad Nayeem — Wed, 01 Jul 2026 12:49:27 GMT

Part Number: TPS62160

Please provide SPICE Model of TPS62160QDSGRQ1

LMR51635: Request for Documentation (Shizuoka) LMR51635

NIRASAWA YUI — Wed, 01 Jul 2026 08:45:28 GMT

Part Number: LMR51635

Dear Sir/Madam,

Thank you for your continued support.

I would like to kindly ask for your guidance regarding the LMR51635 on the following two points:

1. Thermal resistance on a 2-layer PCB
If you have any documents, graphs, or other reference materials showing the relationship between copper area and thermal resistance on a 2-layer PCB, I would greatly appreciate it if you could share them with us.

2. Thermal resistance differences due to product variants
I understand that the LMR51635 series includes multiple variants. Could you please confirm whether there is any difference in thermal resistance depending on the specification or variant? If there are any differences, I would appreciate it if you could also let us know the details.

Thank you very much for your assistance.

AM263PX-RESTRICTED-SECURITY: MPU Firewalls

Kunukuntla Geetha — Wed, 01 Jul 2026 07:29:30 GMT

Part Number: AM263PX-RESTRICTED-SECURITY

Hi Team,

In the SysConfig of the HSM firmware for the MPU, L2OCRAM_BANK0_SLV, the initiators allowed to access the region 0x70000000 to 0x70080000 are R5FSS0_0, R5FSS0_1, R5FSS1_0, R5FSS1_1, and M4_0. The MPPA permissions are configured as User Read, User Write, User Execute, Supervisor Read, Supervisor Execute, with Non-Secure (NS) = 1 and EMU = 0.

With these settings, I am not facing any issues. However, if I change the NS setting in the MPPA configuration from 1 to 0, the SBL fails, and the error interrupt is triggered.

Can you tell me why this violation occurs when NS = 0? and also what is the difference between these non secure and secure access ?? How it will decide secure access is taking place?

DP83TG720-SCHEMATIC-CHECKLIST: 1000base-t1 IBIS-AMI

hiroyuki yajima — Wed, 01 Jul 2026 05:32:59 GMT

Part Number: DP83TG720-SCHEMATIC-CHECKLIST

I would like to obtain the IBIS-AMI model to verify 1000base-t1 Ethernet connectivity through analysis.
Could you please provide it?

RE: UC1843A-EP: ESD class and SPICE model for UC1843AMDREP

Adam Shiau — Wed, 01 Jul 2026 03:11:40 GMT

Hi John,

Thanks for your reply.

I couldn't find the ±2000V rated value mentioned in the datasheet.

Could you please let me know which document contains this specification?

I need to provide this official document to our customer.

Thank you very much!

Best regards,

Adam

RE: LM5117QUICK-CALC: LM5157 PSPICE ISSUSE

hu xianke — Wed, 01 Jul 2026 02:35:33 GMT

OK thanks ,

i got the model from local TI contact

LM5117QUICK-CALC: LM5157 PSPICE ISSUSE

hu xianke — Mon, 15 Jun 2026 09:28:40 GMT

Part Number: LM5117QUICK-CALC

Hello

I download the LM5157 pspice file from the TI website ,but it can not run in ansys ,ansys support

say the file is Encryption data , how can i get the decryption data?

thanks

PSPICE-FOR-TI: PSpice for TI: Reached the concurrent device access limit

masaaki nagahashi — Wed, 01 Jul 2026 02:08:13 GMT

Part Number: PSPICE-FOR-TI

Hello,

I cannot sign in to PSpice for TI. I am receiving the following error message: "You have reached the concurrent device access limit. Too many devices are attempting to connect with the same access key."

Could you please reset my device access limit? (My myTI email address is: m_nagahashi@emb-tech.co.jp)

Thank you.

RE: SN54SC6T17-SEP: No IBIS models for any level translators

Mark Bryant — Tue, 30 Jun 2026 18:43:49 GMT

We have that model.

The rising and falling waveforms are distorted for a couple voltages, specifically the 2.5V model.

The rising and falling waveform data in the model uses 2k Ohm R-fixture values, which should be at 50 Ohms.

The R-fixture = 2k should be 50 Ohms, since every trace this part drives is likely a transmission line with a 50 Ohm characteristic impedance, and the IBIS cookbook highly recommends using 50 Ohms to develop the rising and falling waveform data.

I commented out the Rising and Falling waveform data and modified the Ramp data to match the rise/fall times to get around this issue, but it would be better for TI to fix the model.

Thanks,

Mark

RE: SN54SC6T17-SEP: No IBIS models for any level translators

Joshua Salinas — Tue, 30 Jun 2026 18:18:14 GMT

Hello Mark,

Apologies for the inconvenience.

We are now requiring IBIS models to be released alongside our parts but unfortunately this was applied after the release of SCxT-SEP devices. If you need an SEP model, please take a look at our SN54SLC8T245-SEP.

Regards,

Josh

LM5149-LM25149DESIGN-CALC: Having issues with simulating LM5149 in OrCAD CAPTURE CIS

Jayant Yadav — Thu, 25 Jun 2026 17:45:24 GMT

Part Number: LM5149-LM25149DESIGN-CALC

Part Number: LM5149-Q1
Simulation Tool: OrCAD PSpice (Version 25.1.0)
Design Files: Official TI PSpice Transient Model (snvmcb8)

Title:
LM5149-Q1 PSpice Simulation Error: ORPSIM-15141 Less than 2 connections at CNFG pin node.

Description:
I am trying to run a transient simulation of the LM5149-Q1 using the official PSpice transient model downloaded directly from the TI product page. My goal is to analyze the power stage output voltage waveforms and overall loop stability.

However, the PSpice netlist generator fails to compile, throwing an ORPSIM-15141 error pointing directly to the CNFG pin (Pin 5) configuration node.

Error Log Details:

X_U2 0 N07529 0 N06736 N07786 N05878 N053186 N053187 N06813 N06153 + N07052 N06845 0 N07040 N08313 N07790 N06160 N06746 N06643 N07070 N06488 N05878 + N07070 0 0 LM5149-Q1_TRANS PARAMS: STEADY_STATE=0

R_R8 0 N07786 24.9k TC=0,0

ERROR(ORPSIM-15141): Less than 2 connections at node N07786.

Troubleshooting Already Attempted:

Verified physical schematic routing multiple times. Resistor R8 (24.9k) is visibly wired between the CNFG pin and Ground.
Replaced the resistor component and placed a fresh instance on the schematic to eliminate any hidden connection glitches.
Attempted to isolate the pin by connecting a 1-Gigaohm dummy load resistor to ground. The simulation still threw the identical "Less than 2 connections" error at the CNFG node.
Exported the .lib file directly to a new Capture Part Library via the PSpice Model Editor to generate a fresh .olb symbol, but the pin-mismatch compilation crash persists.
In the OLB graphic library property editor, the CNFG pin type is natively designated as "Bidirectional".

Full error code of the latest run:


**** 06/25/26 22:02:01 ***** PSpice 25.1.0 (25 March 2026) **** ID# 0 ********

 ** Profile: "SCHEMATIC1-LM_5149"  [ c:\users\idk\documents\kaza baseboard\simulations\lm_5148\lm_514-PSpiceFiles\SCHEMATIC1\LM_5149.


 ****     CIRCUIT DESCRIPTION


******************************************************************************




** Creating circuit file "LM_5149.cir" 
** WARNING: THIS AUTOMATICALLY GENERATED FILE MAY BE OVERWRITTEN BY SUBSEQUENT SIMULATIONS

*Libraries: 
* Profile Libraries :
* Local Libraries :
.LIB "C:/Users/idk/Downloads/slpm041b/CSD18503Q5A.lib" 
.LIB "C:/Users/idk/Downloads/snvmcb8/lm5149-q1_trans.lib" 
* From [PSPICE NETLIST] section of C:\SPB_Data\cdssetup\OrCAD_PSpice\25.1.0\PSpice.ini file:
.lib "nom.lib" 

*Analysis directives: 
.TRAN  0 10ms 0 0.1ms 
.OPTIONS ADVCONV
.PROBE64 V(alias(*)) I(alias(*)) W(alias(*)) D(alias(*)) NOISE(alias(*)) 
.INC "..\SCHEMATIC1.net" 



**** INCLUDING SCHEMATIC1.net ****
* source LM_514
X_U2         0 N07529 0 N06736 N07786 N05878 N053186 N053187 N06813 N06153
+  N07052 N06845 0 N07040 N08313 N07790 N06160 N06746 N06643 N07070 N06488 N05878
+  N07070 0 0 LM5149-Q1_TRANS PARAMS:  STEADY_STATE=0
V_V1         N05874 0 0Vdc
L_L1         N05874 N05878  0.68u  TC=0,0 
C_C1         0 N05887  0.1u  TC=0,0 
C_C2         0 N05878  47u  TC=0,0 
R_R1         N05887 N05874  0.47 TC=0,0 
C_C3         N06160 N05874  0.1u  TC=0,0 
C_C4         N06136 N05874  0.47u  TC=0,0 
R_R2         N06153 N06136  3 TC=0,0 
R_R3         N06228 N06153  200 TC=0,0 
C_C5         N06160 N06228  1n  TC=0,0 
R_R4         N06160 N06153  49.9k TC=0,0 
C_C6         0 N06488  0.1u  TC=0,0 
R_R5         N06488 N053187  49.9k TC=0,0 
C_C7         0 N06643  1n  TC=0,0 
C_C8         N06746 N06736  0.1u  TC=0,0 
X_X1         N05878 N06813 N06746 csd18503q5a PARAMS:
X_X2         N06746 N06845 N07040 csd18503q5a PARAMS:
L_L2         N06746 N07052  0.68u  TC=0,0 
R_R6         N07052 N07070  8m TC=0,0 
C_C9         0 N05878  10p  TC=0,0 
C_C10         0 N05878  10p  TC=0,0 
C_C11         0 N07070  47u  TC=0,0 
C_C12         0 N07070  47u  TC=0,0 
C_C13         0 N07070  47u  TC=0,0 
C_C14         0 N07070  47u  TC=0,0 
R_R7         N06643 N07529  3 TC=0,0 
C_C15         0 N07529  2.2u  TC=0,0 
R_R8         0 N07786  24.9k TC=0,0 
R_R9         0 N07790  9.52k TC=0,0 
R_R10         N06488 N08313  100k TC=0,0 
R_R11         N084131 N053186  24.3k TC=0,0 
C_C16         0 N084131  1.1n  TC=0,0 


** Wrapper definitions for AA legacy support **

.subckt csd18503q5a  1 2 3

.param  ptrc1    7.00e-3  
.param  ptrc2    2.0e-5
.param  pwidthp  4.02
.param  pwidth   {pwidthp*1e6}
.param  perimp   {2.1*pwidthp}
.param  perim    {perimp*1e6}
m1   10 11 12 12  nmos  w={pwidthp} l=0.5u  ps={perimp} pd={perimp}
xcgd    5       10      1       3       cgd
cgs     5       8       1.04e-9
xcds    8       10      1       3       cds
dbd     3       1       dbd {4.02/5.788666666666666666666666666666666666666666666667}
lgg   2  5       2.1e-9
rgg   5 11       4.40
rsb  12  9       rtemp 0.23166e-3
r   9  8         rtemp 0.23166e-3
rsp   8  6       0.55e-3
l   6  3         0.47e-9
rsl   6  3   0.5
rdd   7 10       rtemp 2.05e-3
rdp   4  7       0.5e-4
ldd   1  4       0.05e-9

.model nmos nmos
+ level=7
+ version=3.2
+ capmod=2
+ nlx=1.74e-07
+ vbm=-5
+ dvt0=2.2
+ dvt1=0.53
+ dvt2=-0.032
+ u0=650
+ ua=1.4e-09
+ ub=5e-18
+ a0=1
+ ags=0
+ a1=0
+ a2=1
+ lint=5.5e-08
+ voff=-0.28
+ nfactor=2
+ eta0=0.005
+ etab=-0.07
+ dsub=1.4
+ pclm=0.25
+ pdiblc1=0.02
+ pdiblc2=0.004
+ drout=0.9
+ pscbe1=3e+08
+ pscbe2=1e-06
+ pvag=0.1
+ delta=0.022
+ js=0
+ cgso=1e-18
+ cgdo=1e-18
+ cgbo=1e-18
+ cj=1e-18
+ cjsw=1e-18
+ cf=0
+ tnom=25
+ ute=-1.5
+ kt1=-0.85
+ kt1l=1e-15
+ kt2=0.022
+ ua1=2.5e-11
+ ub1=-8e-19
+ tox=4e-08
+ xj=3e-07
+ nch=1.275e+17
+ nsub=1e+16


.model pmosd pmos
+ level=1
+ tnom=27
+ vto=-0.3
+ is=6e-14
+ tox=4e-08
+ nsub=1.5e+18
+ gamma=10
+ cj=1e-18
+ cjsw=1e-18
+ cgso=1e-18
+ cgdo=1e-18
+ cgbo=0


.model dbd d
+ cjo=7.5e-15
+ vj=0.5
+ m=0.625
+ tnom=25
+ fc=0.5
+ tt=2e-09
+ xti=3.3
+ bv=41
+ is=7e-12
+ n=1.045
+ rs=0.000625
+ trs1=0.004


.model rtemp res


.model ddx d
+ cjo=8.5e-11
+ vj=0.5
+ m=0.45
+ is=1e-12
+ rs=1
+ tnom=27

.ends csd18503q5a


**** RESUMING LM_5149.cir ****
.END

ERROR(ORPSIM-15141): Less than 2 connections at node N07786.

RE: LM5149-LM25149DESIGN-CALC: Having issues with simulating LM5149 in OrCAD CAPTURE CIS

Timothy Hegarty — Tue, 30 Jun 2026 17:29:37 GMT

e2e.ti.com/.../LM5148_2D00_Q1-simplified-model.sxsch

BQ79600EVM: BQ79600EVM: Defective unit of BQ79600EVM-030

George Garxenaj — Thu, 18 Jun 2026 19:17:25 GMT

Part Number: BQ79600EVM

Hello,

We have a defective unit of BQ79600EVM-030.
For your reference TI order number: T06412996.
Please see the defect details below and advise on RMA.

Issue found: we connect to the board using a connector called USB2Any (also TI's product). As soon as the USB2Any gets connected to it, nFAULT LED is triggered.

Then when supplying power to it (5V or 12V), the nFAULT LED shuts down but when receiving the Wake Up ping, the board is not able to be awaken (indicated by another LED).

We tried verifying if the there was an issue with the set-up we are currently using, but when connecting the other ones we have to the same hardware, they work as expected.

(The nFAULT is not immediately triggered and we are able to wake the device up).

We also varied the placements of the jumpers to explore different configurations available, but the behavior persisted and there is no clear damage to the board as far as I could see.

Let me know if you need any more information. The following forum was opened but never completed on this issue as the OPAL member in question went on vacation. I'm here to start this solution thread again and answering the questions with information which was requested previously: BQ79600EVM: Defective unit of BQ79600EVM-030 - Simulation, hardware & system design tools forum - Simulation, hardware & system design tools - TI E2E support forums

1. Jumper configuration and hardware setup:

J1: 1-2 (12V mode)
J3: 1-2 (12V mode)
J6: 1-2 (3.3V VIO)
J8: populated
J10: 2-3 (UART)
J11: 2-3 (UART)
J12: 2-3 (UART)
J13: populated

Yes, we are using the BQAutoEval GUI for testing.

2. Waveform captures:

CVDD, DVDD, BAT: Constant 0V with only a few tens of mV of noise observed. No transitions or responses detected during wake or shutdown events.
VIO: Constant 3.3V regardless of wake or shutdown events, no transitions observed (light remains ON as long as USB2Any connected, as mentioned by Lucas).
The device appears to show no activity on these rails during wake/shutdown events, suggesting it is not responding to commands.

3. ABA swap:
We do not have rework equipment available to perform a TSSOP-16 desoldering/swap, so we are unable to complete this test.

Regards,

George

RE: BQ79600EVM: BQ79600EVM: Defective unit of BQ79600EVM-030

Lucas Freitas — Tue, 30 Jun 2026 17:09:51 GMT

Hi Michelle,
My name is Lucas and I am the engineer at OPAL-RT resposible for this case. We have been in contact before through another thread (https://e2e.ti.com/support/tools/simulation-hardware-system-design-tools-group/sim-hw-system-design/f/simulation-hardware-system-design-tools-forum/1649515/bq79600evm-defective-unit-of-bq79600evm-030) and emails with Janna and some other people.

We have opened this RMA on May 26th, is there a way for us to accelerate this return?
Best regards,

Lucas Freitas.

RE: UC1843A-EP: ESD class and SPICE model for UC1843AMDREP

John Gomez — Tue, 30 Jun 2026 15:44:55 GMT

Hi Adam,

UC1843A HBM israted ±2000V, which means the HBM ESD Device Classification device level is 2.

Regarding models, you could try the UCC2803 models, which have the same functionality as UC1843A - https://www.ti.com/product/UCC2803-EP#design-development

Thanks,

John

RE: BQ79600EVM: Defective unit of BQ79600EVM-030

Lucas Freitas — Tue, 30 Jun 2026 14:37:20 GMT

Hello Rohin,

Sorry about the delay, my colleague was instructed to continue this topic on another thread (https://e2e.ti.com/support/tools/simulation-hardware-system-design-tools-group/sim-hw-system-design/f/simulation-hardware-system-design-tools-forum/1656742/bq79600evm-bq79600evm-defective-unit-of-bq79600evm-030) and he has performed the tests. Here is his reply on the post:

1. Jumper configuration and hardware setup:

J1: 1-2 (12V mode)
J3: 1-2 (12V mode)
J6: 1-2 (3.3V VIO)
J8: populated
J10: 2-3 (UART)
J11: 2-3 (UART)
J12: 2-3 (UART)
J13: populated

Yes, we are using the BQAutoEval GUI for testing.

2. Waveform captures:

CVDD, DVDD, BAT: Constant 0V with only a few tens of mV of noise observed. No transitions or responses detected during wake or shutdown events.
VIO: Constant 3.3V regardless of wake or shutdown events, no transitions observed (light remains ON as long as USB2Any connected, as mentioned by Lucas).
The device appears to show no activity on these rails during wake/shutdown events, suggesting it is not responding to commands.

3. ABA swap:
We do not have rework equipment available to perform a TSSOP-16 desoldering/swap, so we are unable to complete this test.

Please feel free to let me know in case you need any more information from our side.

Best regards,

Lucas Freitas

BQ79600EVM: Defective unit of BQ79600EVM-030

Chau Sirimoungkhoune — Tue, 26 May 2026 16:14:34 GMT

Part Number: BQ79600EVM

Hello,

We have a defective unit of BQ79600EVM-030.
For your reference TI order number: T06412996.
Please see the defect details below and advise on RMA.

Issue found: we connect to the board using a connector called USB2Any (also TI's product). As soon as the USB2Any gets connected to it, nFAULT LED is triggered.

Then when supplying power to it (5V or 12V), the nFAULT LED shuts down but when receiving the Wake Up ping, the board is not able to be awaken (indicated by another LED).

We tried verifying if the there was an issue with the set-up we are currently using, but when connecting the other ones we have to the same hardware, they work as expected.

(The nFAULT is not immediately triggered and we are able to wake the device up).

We also varied the placements of the jumpers to explore different configurations available, but the behavior persisted and there is no clear damage to the board as far as I could see.

Let me know if you need any more information.