https://e2e.ti.com/support/tools/simulation-hardware-system-design-tools-group/sim-hw-system-design/Jump start system design and speed time to market with comprehensive designs including schematics or block diagrams, BOMs, design files and test reports. Connect here to the experts with deep system and product knowledgeen-USTelligent Community 13https://e2e.ti.com/support/tools/simulation-hardware-system-design-tools-group/sim-hw-system-design/f/simulation-hardware-system-design-tools-forum/1658522/bq76907-q1-design-spice-model-for-bq76200pw-partThu, 25 Jun 2026 10:56:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:f605dd1c-b321-4df5-bf21-5c91772b2fb8Aparajita DashPart Number: BQ76907-Q1-DESIGN Can i get spice model for this nFET gate driverBQ76907-Q1-DESIGNhttps://e2e.ti.com/support/tools/simulation-hardware-system-design-tools-group/sim-hw-system-design/f/simulation-hardware-system-design-tools-forum/1658471/uc2901-esd-class-and-spice-model-for-uc2901dThu, 25 Jun 2026 09:01:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:28e98de2-34a3-4015-9843-56e047678150Adam ShiauPart Number: UC2901 Hi TI team, I'm looking into using the UC2901D and have a couple of quick questions. I checked the reliability report and noticed it mentions ESD-HBM results, but I couldn't find any specific ESD details in the datasheet itself. Since this is for a high-reliability design, we just want to make sure if this part happens to be ESD Class 0. Also, is there a SPICE model available for this specific part number? Thanks for the help! Best, AdamUC2901https://e2e.ti.com/support/tools/simulation-hardware-system-design-tools-group/sim-hw-system-design/f/simulation-hardware-system-design-tools-forum/1658465/uc1843a-ep-esd-class-and-spice-model-for-uc1843amdrepThu, 25 Jun 2026 08:54:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:db4c3eee-c02c-4b5c-9643-9f7a61f89c7dAdam ShiauPart Number: UC1843A-EP Hi TI team, I'm looking into using the UC1843AMDREP and have a couple of quick questions. I checked the reliability report and noticed it mentions ESD-HBM results, but I couldn't find any specific ESD details in the datasheet itself. Since this is for a high-reliability design, we just want to make sure if this part happens to be ESD Class 0. Also, is there a SPICE model available for this specific part number? Thanks for the help! Best, AdamUC1843A-EPhttps://e2e.ti.com/support/tools/simulation-hardware-system-design-tools-group/sim-hw-system-design/f/simulation-hardware-system-design-tools-forum/1654015/ucc28950-need-assistance-designing-4kw-20a-200v-output/6394759Thu, 25 Jun 2026 07:38:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:279b0a3d-ba4d-410c-bdf0-ca2da05c22c6Edwin TanDear Kumar, No worries, thank you for assisting. I hope the simulation will work as expected. As of right now, the major issue I am facing is achieving the desired secondary voltage which I hope the results will reflect it. As for the 3x interleaved PSFB I have found a shift register (SN74HC164) and ran some simulation. So far it looks okay it just that the fsync of each slave is not 50% duty, which I will try to amend. The resultant output current ripple was also larger than the 2x interleaved PSFB which is unexpected. I will do the necessary adjustment to achieve 50% duty on the fsync of each slave and hope the output current ripple be much lesser, else I will need to seek for your expertise. I have also received your excel file, and I will run the simulation based on that as well and update you again. Edwinhttps://e2e.ti.com/support/tools/simulation-hardware-system-design-tools-group/sim-hw-system-design/f/simulation-hardware-system-design-tools-forum/1654015/ucc28950-need-assistance-designing-4kw-20a-200v-output/6394682Thu, 25 Jun 2026 06:44:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:1453fc7a-3c8d-45e6-b71e-f93abfa7cf49Anil KumarHi Edwin, Sorry for delay as I was out of office for past couple of days. I'm sharing the revised EXCEL calculator over the mail, as per your requirement. Please follow the parameter value as per shared EXCEL sheet calculation. Regarding DELEF resistor value, as you input to the required delay time was 15ns, which is not possible as minimum programmable delay between OUTA, OUTF and OUTB, OUTE set by resistor DELEF is 30ns. That was the reason for calculated RDELEF value was out of recommended range. I'm running the simulation, it's taking little while, I'll run the simulation and share the result as soon as possible. Good to know that you were able to run interleave PSFB. For 3x interleaved PSFB you can use some logic circuit (by adding delay) for phase shift, because even I'm not able to find any phase shift register which includes PSPICE model. Regards, Anilhttps://e2e.ti.com/support/tools/simulation-hardware-system-design-tools-group/sim-hw-system-design/f/simulation-hardware-system-design-tools-forum/1657165/ucc5714x-calc-ucc5880-pspice-model-question/6394478Thu, 25 Jun 2026 02:19:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:ad21d199-986f-4399-a827-6e5c7f9ed367hu xiankehello thanks for your support ,and could you tell me why there have some error when run this model in ansys circiut? ansys fae said ：Each sub-circuit call must have. The subckt defines the circuit first, is there any error of this model?https://e2e.ti.com/support/tools/simulation-hardware-system-design-tools-group/sim-hw-system-design/f/simulation-hardware-system-design-tools-forum/1658252/pspice-for-ti-pspice-for-ti---previous-working-and-new-sims-with-mosfets-and-diodes-do-not-work/6393909Wed, 24 Jun 2026 16:21:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:4d071476-3f38-4999-ae7d-0d392fefc54bJames ChoErrors messages in the sim window show: ERROR(ORPSIM-15108): Subcircuit (MOSFET) used by X_U1 is undefined. The local library location and file are shown correctly in the libraries section of the output file.https://e2e.ti.com/support/tools/simulation-hardware-system-design-tools-group/sim-hw-system-design/f/simulation-hardware-system-design-tools-forum/1658252/pspice-for-ti-pspice-for-ti---previous-working-and-new-sims-with-mosfets-and-diodes-do-not-workWed, 24 Jun 2026 16:13:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:388166b9-6ff1-46cf-9d75-7f87cf8ccb1bJames ChoPart Number: PSPICE-FOR-TI Files created and simulated in the past have errors with markers and do not simulate now. New files re-created with the same or similar mosfet and diode models also fail with marker errors or unable to find model errors. These library models had been previously generated through the PSPICE app and were previously working.PSPICE-FOR-TIhttps://e2e.ti.com/support/tools/simulation-hardware-system-design-tools-group/sim-hw-system-design/f/simulation-hardware-system-design-tools-forum/1658062/lm5066h-schematic-design-and-simulation-of-lm5066h1/6393840Wed, 24 Jun 2026 15:40:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:f17295fe-3880-44a5-9eb3-e4119a0fbabdAvishek PalThanks for reaching out. It will be responded by Friday.https://e2e.ti.com/support/tools/simulation-hardware-system-design-tools-group/sim-hw-system-design/f/simulation-hardware-system-design-tools-forum/1654964/pspice-for-ti-pspice-too-many-devices-clear-old-devices/6393803Wed, 24 Jun 2026 15:17:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:5d877205-f4cb-4739-8a9c-0ce95bdea669Simon JonesHi Adrian, thanks for the reply. Please can you let me know how I direct message you with the account details?https://e2e.ti.com/support/tools/simulation-hardware-system-design-tools-group/sim-hw-system-design/f/simulation-hardware-system-design-tools-forum/1658159/txs0102-request-for-ibis-model/6393801Wed, 24 Jun 2026 15:16:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:9d88c498-09dc-4378-a9f1-5e745cb57cdaJack GuanHello, Please see the attached: TXS0102_IBIS.zip Regards, Jackhttps://e2e.ti.com/support/tools/simulation-hardware-system-design-tools-group/sim-hw-system-design/f/simulation-hardware-system-design-tools-forum/1653911/pspice-for-ti-pspice-for-ti-license-service-unavailable-error/6393523Wed, 24 Jun 2026 11:42:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:91d2b019-d8c4-4a0b-b8f5-0b6e4f3c9580Shubham ThakkarHello Adrian, Thank you for the response. I tried, but still it shows the same error.https://e2e.ti.com/support/tools/simulation-hardware-system-design-tools-group/sim-hw-system-design/f/simulation-hardware-system-design-tools-forum/1658159/txs0102-request-for-ibis-modelWed, 24 Jun 2026 11:33:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:a56fe96e-f824-474f-8d47-ad89441ad10aramakrishna SangaPart Number: TXS0102 Dear TEXAS Team, I hope this message finds you well. I Want TXS0102DQER this IC IBIS Model. Could you please Share Them. Thank you for your time and support. I look forward to your response. Best regards, Argus Embedded Systems.TXS0102https://e2e.ti.com/support/tools/simulation-hardware-system-design-tools-group/sim-hw-system-design/f/simulation-hardware-system-design-tools-forum/1658119/afe7950evm-query-regarding-jesd204-ip-license-with-afe7950-afe7900-evm-and-fpga-supportWed, 24 Jun 2026 09:48:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:8f0f7731-225a-4ddb-b9b7-cfd05ecdc25esuman bPart Number: AFE7950EVM Other Parts Discussed in Thread: AFE7900EVM , , AFE7900 , AFE7950 Dear TI Team, We are planning to purchase the AFE7950EVM/AFE7900EVM for evaluation with a Xilinx ZCU102 FPGA board. Our FPGA development environment uses AMD Xilinx Vivado. Although Vivado provides JESD204 IP blocks, we currently do not have a separate license for the JESD204 IP. Could you please clarify the following: When purchasing the AFE7950EVM or AFE7900EVM, does TI provide any JESD204B/C IP license for AMD Xilinx FPGAs? Is the TI JESD204 Rapid Design IP/package available free of cost along with the EVM, or does it require a separate purchase/license from AMD/Xilinx? Can the ZCU102 board be used as a suitable FPGA platform for interfacing with the AFE7950/AFE7900 EVM? Are there any reference designs or example projects available specifically for AFE7950/AFE7900 with ZCU102? Thank you for your support.AFE7900EVMAFE7950EVMAFE7950Wireless InfrastructureAFE7900https://e2e.ti.com/support/tools/simulation-hardware-system-design-tools-group/sim-hw-system-design/f/simulation-hardware-system-design-tools-forum/1658062/lm5066h-schematic-design-and-simulation-of-lm5066h1Wed, 24 Jun 2026 08:09:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:bee2cf5a-6e07-468f-b9d7-cb99b4369e4dAswathi M SPart Number: LM5066H We are using L5066H1 efuse in the power supply design for our board and require clarity in following points for schematic design and firmware configuration. 1. In the LM5066H1EVM, Why +3P3V_HOST is provided at J7 connector? Where is the 3.3V supplied to and from where is it supplied from? 2. In the EVM, all the HOST signals, SCL-HOST, SDA-HOST, SMBA#-HOST, QGND-HOST are send to the corresponding pins of LM5066H1 from the J7 connector via two nos of 0 ohm resistor. Why this 2 nos are placed? Should we follow the same in our schematic design? 3.We are planning to provide 2 provisions for programming LM5066H1 on our board: via FPGA and via adapter. Kindly confirm whether multi-master bus architecture can be implemented. If any documents are available for software configuration, do share. 4.Kindly share the timing diagram for LM5066H1 (SCL, SDA, SMBA - The diagram is unavailable in the datasheet) 5. We tried installing TINA TI for simulation, but library for LM5066H1 is not available. KIndly help us in simulation of the IC.LM5066H1EVMLM5066Hhttps://e2e.ti.com/support/tools/simulation-hardware-system-design-tools-group/sim-hw-system-design/f/simulation-hardware-system-design-tools-forum/1658015/ucc28180-review-of-hardware-ovp-external-with-auto-restart-for-ucc28180-pfcWed, 24 Jun 2026 06:41:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:c714c50a-e990-4828-9465-61894c3a349eSampath KumarPart Number: UCC28180 Other Parts Discussed in Thread: TL431 Hi, I am implementing a hardware overvoltage protection circuit for a UCC28180 boost PFC and would like to verify whether this approach is acceptable. Specifications: Output bus voltage = 400 V OVP trip voltage = 420 V Auto restart voltage = 400 V Auxiliary supply = 12V/15V Operation: A resistor divider from the 400 V bus drives the REF pin of a TL431. When the bus voltage exceeds 420 V, the TL431 turns ON. The TL431 cathode drives an NPN transistor through a 10 kohm resistor. During overvoltage, the NPN turns OFF and a pullup resistor drives the gate of a 2N7002 high. The 2N7002 pulls the UCC28180 COMP pin to ground to stop switching. A hysteresis resistor from the NPN collector node back to the TL431 divider node is used to provide approximately 20 V hysteresis and automatic restart around 400 V. My questions are: Is pulling the COMP pin low using a 2N7002 an acceptable method for hardware OVP shutdown? Is this TL431 + NPN + MOSFET architecture suitable for UCC28180? Is the hysteresis resistor from the fault output node back to the divider node a recommended approach? Are there any concerns regarding COMP pin behavior and soft-start recovery during restart? Thank you.UCC28180HybridTL431electric & powertrain systemshttps://e2e.ti.com/support/tools/simulation-hardware-system-design-tools-group/sim-hw-system-design/f/simulation-hardware-system-design-tools-forum/1657165/ucc5714x-calc-ucc5880-pspice-model-question/6393087Wed, 24 Jun 2026 06:09:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:f7162968-0d67-452c-9b95-c348986f99fchu xiankehello thanks for your support ,and could you tell me why there have some error when run this model in ansys circiut? ansys fae said ：Each sub-circuit call must have. The subckt defines the circuit first, is there any error of this model?https://e2e.ti.com/support/tools/simulation-hardware-system-design-tools-group/sim-hw-system-design/f/simulation-hardware-system-design-tools-forum/1657165/ucc5714x-calc-ucc5880-pspice-model-question/6393080Wed, 24 Jun 2026 06:06:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:20af4a61-468a-408d-86e0-e3a53fafe4fbhu xiankethankshttps://e2e.ti.com/support/tools/simulation-hardware-system-design-tools-group/sim-hw-system-design/f/simulation-hardware-system-design-tools-forum/1657608/mcf8329evm-mcf8329a-evaluation-module-evm-query/6393020Wed, 24 Jun 2026 05:12:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:98437ae4-b88e-426e-9736-f99b3b5e82a4DhineshHi Priyansh, There is no available option to restore the EEPROM content to default values. However, you can overwrite the EEPROM content by reloading the default values through MotorStudio and executing the EEPROM write operation. MCF8329A default register values: Register Address Register name Value 0x80 ISD_CONFIG 0x64A2D4A1 0x82 REV_DRIVE_CONFIG 0x48300000 0x84 MOTOR_STARTUP1 0x10A64CC0 0x86 MOTOR_STARTUP2 0x2D81C007 0x88 CLOSED_LOOP1 0x1D7181B8 0x8A CLOSED_LOOP2 0x0AAD0000 0X8C CLOSED_LOOP3 0x00000000 0x8E CLOSED_LOOP4 0x000004B0 0x90 FAULT_CONFIG1 0x465A31A6 0x92 FAULT_CONFIG2 0x71422888 0x94 REF_PROFILES1 0x00000000 0x96 REF_PROFILES2 0x00000000 0x98 REF_PROFILES3 0x00000004 0x9A REF_PROFILES4 0x00000000 0x9C REF_PROFILES5 0x00000000 0x9E REF_PROFILES6 0x00000000 0xA0 INT_ALGO_1 0x0946027D 0xA2 INT_ALGO_2 0x020082E3 0xA4 PIN_CONFIG 0x40032309 0xA6 DEVICE_CONFIG1 0x00100002 0xA8 DEVICE_CONFIG2 0x03E8C00C 0xAA PERI_CONFIG1 0x69845CC0 0xAC GD_CONFIG1 0x0000807B 0xAE GD_CONFIG2 0x00000400 Thanks, Dhineshhttps://e2e.ti.com/support/tools/simulation-hardware-system-design-tools-group/sim-hw-system-design/f/simulation-hardware-system-design-tools-forum/1652582/ucc25800-q1-power-loss-calculation/6393012Wed, 24 Jun 2026 05:00:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:f11fe7ac-1c1c-42ca-a586-45222d2467a2Nitesh JhaHi Loss in IC will be ~ 210mW (Assumption you have ZVS on Switches) and temperature rise will be 10 Deg C from Ambient. Also losses on transformer are not included in this and needs to be calculated separately based on Rac of primary and secondary at 470kHz and current through each winding. Regards