https://e2e.ti.com/support/tools/simulation-hardware-system-design-tools-group/sim-hw-system-design/Jump start system design and speed time to market with comprehensive designs including schematics or block diagrams, BOMs, design files and test reports. Connect here to the experts with deep system and product knowledgeen-USTelligent Community 13https://e2e.ti.com/support/tools/simulation-hardware-system-design-tools-group/sim-hw-system-design/f/simulation-hardware-system-design-tools-forum/1658968/lm5156-q1-simulation-supportFri, 26 Jun 2026 12:00:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:0f9c1d0b-f78a-43cb-abc8-a7af71cc5d17Balaji BPart Number: LM5156-Q1 Other Parts Discussed in Thread: LM5156 I had utilized the flyback simulation of LM5156 provided by the TI itself. I had done some modifications in that for getting 28V as output since the TI provided simulation is for output 5V. I had modified flyback transformer ratio in the script itself. Ihad tuned feedback resistor in opto based feedback section. Flyback ratio (Pri : Aux : Sec) : 1:1:3 Flyback transformer inductance : 15uH Feedback bottom resistor value : 1.36k But my output stayed at 5V only not increased to 28V. I'm using Orcad pspice 17.4 for my simulationLM5156LM5156-Q1Aerospace & Defensehttps://e2e.ti.com/support/tools/simulation-hardware-system-design-tools-group/sim-hw-system-design/f/simulation-hardware-system-design-tools-forum/1658694/lm5149-lm25149design-calc-having-issues-with-simulating-lm5149-in-orcad-capture-cis/6396557Fri, 26 Jun 2026 11:57:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:b96d166d-3753-4773-a4f6-62ea64ce17e3Jayant YadavResolved !https://e2e.ti.com/support/tools/simulation-hardware-system-design-tools-group/sim-hw-system-design/f/simulation-hardware-system-design-tools-forum/1658923/lm5067quick-calc-i-am-facing-lm5060-simulations-errorFri, 26 Jun 2026 09:39:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:6735de06-26ac-4496-8a80-380537d19499Aparajita DashPart Number: LM5067QUICK-CALC Other Parts Discussed in Thread: LM5060 Hello, I am simulating the LM5060 in LTspice . Trying get boost voltage by following application circuit and input is 48V,However, I am getting the following error: My goal is to implement a gate driver that outputs or boost more than input supply ( more than 50 and less than 65V) Error: Questionable use of curly braces in "b§e_abmgate yint 0 v={if(v(a)>{{vthresh}},{{vss}},{{vdd}})}" Error: undefined symbol in: "if([v](a)>((vthresh)),((vss)),((vdd)))"LM5067QUICK-CALCLM5060https://e2e.ti.com/support/tools/simulation-hardware-system-design-tools-group/sim-hw-system-design/f/simulation-hardware-system-design-tools-forum/1654015/ucc28950-need-assistance-designing-4kw-20a-200v-output/6396229Fri, 26 Jun 2026 06:41:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:67c3e1ef-e334-4b6b-abdd-7b4ccfe13635Edwin TanDear Kumar, I am using my personal TI account to reply you as I am out of office at the moment and is unable to use my work email. The primary and secondary switches I am using for simulations is the default models provided by the simulation file (Slum169c). Which are, Primary (SPP20N60CFD) and Secondary (FDP032N08). Edwinhttps://e2e.ti.com/support/tools/simulation-hardware-system-design-tools-group/sim-hw-system-design/f/simulation-hardware-system-design-tools-forum/1658749/tpsm861253evm-un-encrypted-spice-file-for-tpsm861253rdxr/6396211Fri, 26 Jun 2026 06:31:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:6084cf55-31b9-40f1-9c6d-5ce481b3c363Alla UshasriHi Joel, Will check and get back to you! Regards, Usha.https://e2e.ti.com/support/tools/simulation-hardware-system-design-tools-group/sim-hw-system-design/f/simulation-hardware-system-design-tools-forum/1654015/ucc28950-need-assistance-designing-4kw-20a-200v-output/6396206Fri, 26 Jun 2026 06:29:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:99be2ed2-7996-4f28-af5b-47892a906333Anil KumarHi Edwin, By some reason, simulation file that you have shared is not opening up, it's getting over return by already existing file in my system. I'm trying to modify my current simulation file but it's throwing some error, I'm debugging the issue, will update you once simulation is done. Meanwhile could you please let me know the part number of primary and secondary switches that you are using for your simulations. Regards, Anilhttps://e2e.ti.com/support/tools/simulation-hardware-system-design-tools-group/sim-hw-system-design/f/simulation-hardware-system-design-tools-forum/1658749/tpsm861253evm-un-encrypted-spice-file-for-tpsm861253rdxrThu, 25 Jun 2026 22:45:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:51e91290-4923-4127-b474-6310f2390a01Joel EdmundPart Number: TPSM861253EVM Other Parts Discussed in Thread: LM5118 , TPSM861253 Hello, to whom this reach. I'm here on a request, for some time now i have been study the LM5118 data sheet and now finally generated a working schematic from a new project on PSpice for TI. On almost completion i received an email from a News Letter from Murata stating they have a new sensor which detects vibration for faulty ball bearing or electrical motor. For me to intergrage this to the newly generated schametic i need to lower my 12 Vout to 3v - 5v, this is how i came across the TPSM861253RDXR ic. On me using the un-encrypted version of the LM5118 with no alteration, i will love to do the same with the TPSM861253RDXR. Opening up the TPSM861253 PSpice file i notice the spice file where encrypted. If possible, is there anyway i can get the un-encrypted spice file for the TPSM861253RDXR ic? thanks so much, joel.power deliveryLM5118TPSM861253TPSM861253EVMhttps://e2e.ti.com/support/tools/simulation-hardware-system-design-tools-group/sim-hw-system-design/f/simulation-hardware-system-design-tools-forum/1658739/pspice-for-ti-bind-limit-reached-after-vm-cpu-topology-changeThu, 25 Jun 2026 20:55:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:0717f19f-72a1-4d8c-8b7a-682367bd70c0Luke MarohnPart Number: PSPICE-FOR-TI I am getting this error after changing my CPU topology in virt manager on Ubuntu. I went from 56 sockets, 1 core, 1 thread each, which was set up as the default for some reason, to 1 socket, 28 cores, 2 threads. This was much faster as windows could actually use all of the cores I gave it, but I keep getting this error. I have used my other two binds for work laptops. Is there a way I could get another bind or get this license un then rebound? Let me know what information you need.PSPICE-FOR-TIhttps://e2e.ti.com/support/tools/simulation-hardware-system-design-tools-group/sim-hw-system-design/f/simulation-hardware-system-design-tools-forum/1658638/lmg3100r044-lmg3100r044-pcb-symbol-footprint-and-ltspice-model/6395556Thu, 25 Jun 2026 17:59:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:29c48ffa-b942-4bad-8302-8a0ecd5d530fEricLeeHello Imrose PSPICE model is not available for this device. Ultra Librarian provides Symbol and Foot prints -ELhttps://e2e.ti.com/support/tools/simulation-hardware-system-design-tools-group/sim-hw-system-design/f/simulation-hardware-system-design-tools-forum/1658694/lm5149-lm25149design-calc-having-issues-with-simulating-lm5149-in-orcad-capture-cisThu, 25 Jun 2026 17:45:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:e10485c1-0180-457b-948c-972e6abc18d9Jayant YadavPart Number: LM5149-LM25149DESIGN-CALC Other Parts Discussed in Thread: LM5149-Q1 Part Number: LM5149-Q1 Simulation Tool: OrCAD PSpice (Version 25.1.0) Design Files: Official TI PSpice Transient Model (snvmcb8) Title: LM5149-Q1 PSpice Simulation Error: ORPSIM-15141 Less than 2 connections at CNFG pin node. Description: I am trying to run a transient simulation of the LM5149-Q1 using the official PSpice transient model downloaded directly from the TI product page. My goal is to analyze the power stage output voltage waveforms and overall loop stability. However, the PSpice netlist generator fails to compile, throwing an ORPSIM-15141 error pointing directly to the CNFG pin (Pin 5) configuration node. Error Log Details: X_U2 0 N07529 0 N06736 N07786 N05878 N053186 N053187 N06813 N06153 + N07052 N06845 0 N07040 N08313 N07790 N06160 N06746 N06643 N07070 N06488 N05878 + N07070 0 0 LM5149-Q1_TRANS PARAMS: STEADY_STATE=0 R_R8 0 N07786 24.9k TC=0,0 ERROR(ORPSIM-15141): Less than 2 connections at node N07786. Troubleshooting Already Attempted: Verified physical schematic routing multiple times. Resistor R8 (24.9k) is visibly wired between the CNFG pin and Ground. Replaced the resistor component and placed a fresh instance on the schematic to eliminate any hidden connection glitches. Attempted to isolate the pin by connecting a 1-Gigaohm dummy load resistor to ground. The simulation still threw the identical "Less than 2 connections" error at the CNFG node. Exported the .lib file directly to a new Capture Part Library via the PSpice Model Editor to generate a fresh .olb symbol, but the pin-mismatch compilation crash persists. In the OLB graphic library property editor, the CNFG pin type is natively designated as "Bidirectional". Full error code of the latest run: **** 06/25/26 22:02:01 ***** PSpice 25.1.0 (25 March 2026) **** ID# 0 ******** ** Profile: "SCHEMATIC1-LM_5149" [ c:\users\idk\documents\kaza baseboard\simulations\lm_5148\lm_514-PSpiceFiles\SCHEMATIC1\LM_5149. **** CIRCUIT DESCRIPTION ****************************************************************************** ** Creating circuit file "LM_5149.cir" ** WARNING: THIS AUTOMATICALLY GENERATED FILE MAY BE OVERWRITTEN BY SUBSEQUENT SIMULATIONS *Libraries: * Profile Libraries : * Local Libraries : .LIB "C:/Users/idk/Downloads/slpm041b/CSD18503Q5A.lib" .LIB "C:/Users/idk/Downloads/snvmcb8/lm5149-q1_trans.lib" * From [PSPICE NETLIST] section of C:\SPB_Data\cdssetup\OrCAD_PSpice\25.1.0\PSpice.ini file: .lib "nom.lib" *Analysis directives: .TRAN 0 10ms 0 0.1ms .OPTIONS ADVCONV .PROBE64 V(alias(*)) I(alias(*)) W(alias(*)) D(alias(*)) NOISE(alias(*)) .INC "..\SCHEMATIC1.net" **** INCLUDING SCHEMATIC1.net **** * source LM_514 X_U2 0 N07529 0 N06736 N07786 N05878 N053186 N053187 N06813 N06153 + N07052 N06845 0 N07040 N08313 N07790 N06160 N06746 N06643 N07070 N06488 N05878 + N07070 0 0 LM5149-Q1_TRANS PARAMS: STEADY_STATE=0 V_V1 N05874 0 0Vdc L_L1 N05874 N05878 0.68u TC=0,0 C_C1 0 N05887 0.1u TC=0,0 C_C2 0 N05878 47u TC=0,0 R_R1 N05887 N05874 0.47 TC=0,0 C_C3 N06160 N05874 0.1u TC=0,0 C_C4 N06136 N05874 0.47u TC=0,0 R_R2 N06153 N06136 3 TC=0,0 R_R3 N06228 N06153 200 TC=0,0 C_C5 N06160 N06228 1n TC=0,0 R_R4 N06160 N06153 49.9k TC=0,0 C_C6 0 N06488 0.1u TC=0,0 R_R5 N06488 N053187 49.9k TC=0,0 C_C7 0 N06643 1n TC=0,0 C_C8 N06746 N06736 0.1u TC=0,0 X_X1 N05878 N06813 N06746 csd18503q5a PARAMS: X_X2 N06746 N06845 N07040 csd18503q5a PARAMS: L_L2 N06746 N07052 0.68u TC=0,0 R_R6 N07052 N07070 8m TC=0,0 C_C9 0 N05878 10p TC=0,0 C_C10 0 N05878 10p TC=0,0 C_C11 0 N07070 47u TC=0,0 C_C12 0 N07070 47u TC=0,0 C_C13 0 N07070 47u TC=0,0 C_C14 0 N07070 47u TC=0,0 R_R7 N06643 N07529 3 TC=0,0 C_C15 0 N07529 2.2u TC=0,0 R_R8 0 N07786 24.9k TC=0,0 R_R9 0 N07790 9.52k TC=0,0 R_R10 N06488 N08313 100k TC=0,0 R_R11 N084131 N053186 24.3k TC=0,0 C_C16 0 N084131 1.1n TC=0,0 ** Wrapper definitions for AA legacy support ** .subckt csd18503q5a 1 2 3 .param ptrc1 7.00e-3 .param ptrc2 2.0e-5 .param pwidthp 4.02 .param pwidth {pwidthp*1e6} .param perimp {2.1*pwidthp} .param perim {perimp*1e6} m1 10 11 12 12 nmos w={pwidthp} l=0.5u ps={perimp} pd={perimp} xcgd 5 10 1 3 cgd cgs 5 8 1.04e-9 xcds 8 10 1 3 cds dbd 3 1 dbd {4.02/5.788666666666666666666666666666666666666666666667} lgg 2 5 2.1e-9 rgg 5 11 4.40 rsb 12 9 rtemp 0.23166e-3 r 9 8 rtemp 0.23166e-3 rsp 8 6 0.55e-3 l 6 3 0.47e-9 rsl 6 3 0.5 rdd 7 10 rtemp 2.05e-3 rdp 4 7 0.5e-4 ldd 1 4 0.05e-9 .model nmos nmos + level=7 + version=3.2 + capmod=2 + nlx=1.74e-07 + vbm=-5 + dvt0=2.2 + dvt1=0.53 + dvt2=-0.032 + u0=650 + ua=1.4e-09 + ub=5e-18 + a0=1 + ags=0 + a1=0 + a2=1 + lint=5.5e-08 + voff=-0.28 + nfactor=2 + eta0=0.005 + etab=-0.07 + dsub=1.4 + pclm=0.25 + pdiblc1=0.02 + pdiblc2=0.004 + drout=0.9 + pscbe1=3e+08 + pscbe2=1e-06 + pvag=0.1 + delta=0.022 + js=0 + cgso=1e-18 + cgdo=1e-18 + cgbo=1e-18 + cj=1e-18 + cjsw=1e-18 + cf=0 + tnom=25 + ute=-1.5 + kt1=-0.85 + kt1l=1e-15 + kt2=0.022 + ua1=2.5e-11 + ub1=-8e-19 + tox=4e-08 + xj=3e-07 + nch=1.275e+17 + nsub=1e+16 .model pmosd pmos + level=1 + tnom=27 + vto=-0.3 + is=6e-14 + tox=4e-08 + nsub=1.5e+18 + gamma=10 + cj=1e-18 + cjsw=1e-18 + cgso=1e-18 + cgdo=1e-18 + cgbo=0 .model dbd d + cjo=7.5e-15 + vj=0.5 + m=0.625 + tnom=25 + fc=0.5 + tt=2e-09 + xti=3.3 + bv=41 + is=7e-12 + n=1.045 + rs=0.000625 + trs1=0.004 .model rtemp res .model ddx d + cjo=8.5e-11 + vj=0.5 + m=0.45 + is=1e-12 + rs=1 + tnom=27 .ends csd18503q5a **** RESUMING LM_5149.cir **** .END ERROR(ORPSIM-15141): Less than 2 connections at node N07786.LM5149CSD18503Q5ALM5149-LM25149DESIGN-CALCLM5149-Q1https://e2e.ti.com/support/tools/simulation-hardware-system-design-tools-group/sim-hw-system-design/f/simulation-hardware-system-design-tools-forum/1658522/bq76907-q1-design-spice-model-for-bq76200pw-part/6395336Thu, 25 Jun 2026 15:42:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:5ff2a2fc-fd1c-45bd-9456-af023435392aAlexis_HHello Aparajita, Unfortunately, we do not have any spice models for our devices due to their complexity. Best Regards, Alexishttps://e2e.ti.com/support/tools/simulation-hardware-system-design-tools-group/sim-hw-system-design/f/simulation-hardware-system-design-tools-forum/1658591/lp87642q1evm-need-datasheet-and-or-pspice-model-for-the-lp876441e4rqkrq1/6395267Thu, 25 Jun 2026 15:12:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:94609399-aaaf-41c0-ba09-9b65b2aa36e6Katie PierHi Jacob, Full LP8764-Q1 datasheet and Simplis models are available under NDA through the secure folder linked from TI.com https://www.ti.com/secureresources/TPS6594X-LP8764X There is also Pspice model available on the TI.com product folder for the LP8764-Q1 devices: https://www.ti.com/product/LP8764-Q1#design-tools-simulation Regards, Katiehttps://e2e.ti.com/support/tools/simulation-hardware-system-design-tools-group/sim-hw-system-design/f/simulation-hardware-system-design-tools-forum/1658638/lmg3100r044-lmg3100r044-pcb-symbol-footprint-and-ltspice-modelThu, 25 Jun 2026 14:45:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:83348ca5-cd1f-4e80-8b5c-4fcdd4a320e6Md Imrose Hossain ShadPart Number: LMG3100R044 Hi guys, I plan to use LMG3100R044 GaN (single FET with integrated driver) for my project. However, I cannot find its spice model, symbol and the footprint. Only its 3D model is available in ultra librarian. Could you guys please look into this? Thanks, ImroseLMG3100R044https://e2e.ti.com/support/tools/simulation-hardware-system-design-tools-group/sim-hw-system-design/f/simulation-hardware-system-design-tools-forum/1658591/lp87642q1evm-need-datasheet-and-or-pspice-model-for-the-lp876441e4rqkrq1Thu, 25 Jun 2026 12:56:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:312056d6-7c28-4737-a946-b635806924e4Jacob MartinPart Number: LP87642Q1EVM Other Parts Discussed in Thread: LP87644Q1EVM , LP8764-Q1 The LP876441E4RQKRQ1 specifically is required for my project, but it is only listed as a component of the LP87644Q1EVM with no real information on the part itself. If possible, I need the datasheet and PSpice model for this part.LP87642Q1EVMLP87644Q1EVMLP8764-Q1https://e2e.ti.com/support/tools/simulation-hardware-system-design-tools-group/sim-hw-system-design/f/simulation-hardware-system-design-tools-forum/1658522/bq76907-q1-design-spice-model-for-bq76200pw-partThu, 25 Jun 2026 10:56:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:f605dd1c-b321-4df5-bf21-5c91772b2fb8Aparajita DashPart Number: BQ76907-Q1-DESIGN Can i get spice model for this nFET gate driverBQ76907-Q1-DESIGNhttps://e2e.ti.com/support/tools/simulation-hardware-system-design-tools-group/sim-hw-system-design/f/simulation-hardware-system-design-tools-forum/1658471/uc2901-esd-class-and-spice-model-for-uc2901dThu, 25 Jun 2026 09:01:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:28e98de2-34a3-4015-9843-56e047678150Adam ShiauPart Number: UC2901 Hi TI team, I'm looking into using the UC2901D and have a couple of quick questions. I checked the reliability report and noticed it mentions ESD-HBM results, but I couldn't find any specific ESD details in the datasheet itself. Since this is for a high-reliability design, we just want to make sure if this part happens to be ESD Class 0. Also, is there a SPICE model available for this specific part number? Thanks for the help! Best, AdamUC2901https://e2e.ti.com/support/tools/simulation-hardware-system-design-tools-group/sim-hw-system-design/f/simulation-hardware-system-design-tools-forum/1658465/uc1843a-ep-esd-class-and-spice-model-for-uc1843amdrepThu, 25 Jun 2026 08:54:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:db4c3eee-c02c-4b5c-9643-9f7a61f89c7dAdam ShiauPart Number: UC1843A-EP Hi TI team, I'm looking into using the UC1843AMDREP and have a couple of quick questions. I checked the reliability report and noticed it mentions ESD-HBM results, but I couldn't find any specific ESD details in the datasheet itself. Since this is for a high-reliability design, we just want to make sure if this part happens to be ESD Class 0. Also, is there a SPICE model available for this specific part number? Thanks for the help! Best, AdamUC1843A-EPhttps://e2e.ti.com/support/tools/simulation-hardware-system-design-tools-group/sim-hw-system-design/f/simulation-hardware-system-design-tools-forum/1654015/ucc28950-need-assistance-designing-4kw-20a-200v-output/6394759Thu, 25 Jun 2026 07:38:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:279b0a3d-ba4d-410c-bdf0-ca2da05c22c6Edwin TanDear Kumar, No worries, thank you for assisting. I hope the simulation will work as expected. As of right now, the major issue I am facing is achieving the desired secondary voltage which I hope the results will reflect it. As for the 3x interleaved PSFB I have found a shift register (SN74HC164) and ran some simulation. So far it looks okay it just that the fsync of each slave is not 50% duty, which I will try to amend. The resultant output current ripple was also larger than the 2x interleaved PSFB which is unexpected. I will do the necessary adjustment to achieve 50% duty on the fsync of each slave and hope the output current ripple be much lesser, else I will need to seek for your expertise. I have also received your excel file, and I will run the simulation based on that as well and update you again. Edwinhttps://e2e.ti.com/support/tools/simulation-hardware-system-design-tools-group/sim-hw-system-design/f/simulation-hardware-system-design-tools-forum/1654015/ucc28950-need-assistance-designing-4kw-20a-200v-output/6394682Thu, 25 Jun 2026 06:44:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:1453fc7a-3c8d-45e6-b71e-f93abfa7cf49Anil KumarHi Edwin, Sorry for delay as I was out of office for past couple of days. I'm sharing the revised EXCEL calculator over the mail, as per your requirement. Please follow the parameter value as per shared EXCEL sheet calculation. Regarding DELEF resistor value, as you input to the required delay time was 15ns, which is not possible as minimum programmable delay between OUTA, OUTF and OUTB, OUTE set by resistor DELEF is 30ns. That was the reason for calculated RDELEF value was out of recommended range. I'm running the simulation, it's taking little while, I'll run the simulation and share the result as soon as possible. Good to know that you were able to run interleave PSFB. For 3x interleaved PSFB you can use some logic circuit (by adding delay) for phase shift, because even I'm not able to find any phase shift register which includes PSPICE model. Regards, Anilhttps://e2e.ti.com/support/tools/simulation-hardware-system-design-tools-group/sim-hw-system-design/f/simulation-hardware-system-design-tools-forum/1657165/ucc5714x-calc-ucc5880-pspice-model-question/6394478Thu, 25 Jun 2026 02:19:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:ad21d199-986f-4399-a827-6e5c7f9ed367hu xiankehello thanks for your support ,and could you tell me why there have some error when run this model in ansys circiut? ansys fae said ：Each sub-circuit call must have. The subckt defines the circuit first, is there any error of this model?