CC2652RB: After generating pins with Sys_bios what is the equivalent of pin.h and <ti/drivers/pin/PINCC26XX.h> in the cc26xx sdk specifically for cc2652rb

specifically for using pin_handle and pin state

Hi Alexander,

What SIMPLELINK-CC13XX-CC26XX-SDK version are you using?  The PIN and GPIO drivers will be deprecated in the 6.20 (2Q22) SDK release. New devices will only support the GPIO++ driver.  You can reference the GPIO++ Driver Porting Guide from the BLE5-Stack Migration Guide.  You can refer to TI Driver examples and TI Drivers Runtime APIs to further understand how to use the TI Drivers in your application code.

Regards,
Ryan

simplelink_cc13xx_cc26xx_sdk_6_40_00_13, and will check that out thanks

why is PINCC26XX imported within the above sdk within SPICC26X2DMA when it is not actually present?

SPICC26X2DMA does not use or reference PINCC26XX, and SPICC26XXDMA is deprecated and not used in the SDK projects.

Regards,
Ryan

ok thanks it is in my sdk, when setting up SPI in Sys_bios, when running i get a hwi where the code previously did not, could this be that SPI is not setting to what is shown in ble_config and what is in the board_init, which i thought was deprecated but is present and continues to persist with the SPI for the launchpad pins

You can remove "Generate Initialization Functions" from the SysConfig -> Board module to remove the BOARD_EXT_FLASH_SPI_* defines and Board_* APIs from the ti_drivers_config.c/h files.

Regards,
Ryan

Thanks so much for the above, sorry to be a continual pain, I cannot understand why my SPI is not being setup correctly, the settings below worked on the CC2640r2f but the settings here dont work for cc22652rb and im wondering if im using sysbios incorreclty 

There is nothing inherently wrong with the code you've provided.  How do you know the SPI is not set up correctly and what is not working on the CC2652RB when you monitor the SPI lines with an oscilloscope or logic analyzer?  Have you evaluated the spimaster example after making necessary SysConfig changes (optionally, remove the SPI master/slave ready GPIO functionality) and what can be deduced from further CCS debugging?

Regards,
Ryan

thanks yeah i cant currently test the lines as i am not near the office unfortunately, i have evaluated the spimaster example yes, i was confused as to what hardware it is inreference too with the slave and master GPIO on the launchpad i assume not to the flash memory?

thanks for getting back to me

The examples require two LaunchPads, one master and the other a slave, with the necessary physical SPI connections between them.  This is covered in the README and the external flash memory is not used.

Regards,
Ryan

necessary physical connections of the 4 pin spi and the extra master and slave ready lines? thanks

A shared GND is also needed, otherwise you have the correct configuration..

duly noted thanks

is there no example projects spi to the flash on board with SPI that isnt SPIFF, the OAD offchip doesnt use sysbios which is where i coped the functionality from previously?

You have already listed all No-RTOS SPI examples provided by TI.

Regards,
Ryan

ok thanks