CC2640 - Support for Independent I/O Supply Voltage Levels (VDDS2 and VDDS3)

As of now (July 2016), does the CC2640 support VDDS2 and VDDS3 I/O supply voltage levels that differ from the VDDS main supply voltage?

I understand that, in the past, this was not supported.

The CC2640 datasheet (October 15, 2015) only makes a single reference to a VDDS/VDDS2/VDDS3 restriction. This is a footnote in the Absolute Maximum Ratings section. I could not find any other references to to this restriction in the datasheet.

The Technical Reference Manual (SWCU117F - June 14, 2016) includes a table (Table 11-4, Section 11.11, Page 984) listing the power domain for each GPIO pin. This implies that independent supply voltages are now supported. If not, the table adds little useful information to designers and is somewhat misleading.

If independent I/O supply voltage levels are now supported are there any Power Supply Sequencing requirements?

If independent I/O supply voltage levels are not yet supported, is there a plan to include support and if so, in what timeframe?

Can you share some more details on the reason for the restriction please? Is it possible that independent supply voltages can be supported under certain circumstances, e.g. pins used, relative voltage difference between supplies, etc.

I really hope that independent I/O supply voltage levels are now supported or will be in a specified timeframe. With independent supply voltage levels, the design that I am currently working on will be elegant, power efficient and cost-effective. Without independent I/O supply voltage levels, the CC2640 is much less attractive in this design and probably many others.

Many thanks,
Kieran