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Run SPPDemo on MSP430BT5190 (MSP430F5438A) with 25MHz processor frequency

Constantin Jacob
Prodigy 140 points
Other Parts Discussed in Thread: MSP430BT5190

Hi,

I'm trying to run the SPPDemo example (on MSP430BT5190 microcontroller) with a cpu frequency of 25MHz. My hardware is an own PCB (equal to EZ430-RF256x reference design) with a MSP430BT5190 and one external 32.786kHz ±20ppm clock.

The cpu frequency are configured in the HRDWCFG.h-File. There is "cf8MHZ_t, cf16MHZ_t, cf20MHZ_t, cf25MHZ_t" selectable.
#define BT_CPU_FREQ  (cf25MHZ_t)

I configured an unused pin as CLK-output and find out, that the cpu frequency is still 22.1184MHz not 25MHz. Why is this so? To configure an uart with an other microcontroller (MSP430 <-> STM32) I need the correct and exact frequency.

Software:
SPPDemo (CC256XMSPBTBLESW-v1.5-R2)

Hardware:
MSP430BT5190 with external 32.786kHz ±20ppm
PAN1326B (CC2564B) (dual supply voltage 3.3V and 1.8V)

Thank you!
Regards,
Constantin

  • 0
    TI__Guru**** 202256 points

    Hi Contantin,

    I'm moving this post to the Dual Mode Bluetooth Forum since their expert's knowledge of the SPPDemo firmware should be able to quickly resolve your issue.

    Edit: Once again not the expert on this firmware, but the BTPSCONST from HAL.c shows that the Frequency_Settings of cf25MHZ_t is really 22.1184 MHz.  Changing this value to 762 results in a system frequency around 25 MHz, but I have not evaluated how this affects the code operation of other peripherals.

    Regards,
    Ryan

  • 0 in reply to Ryan Brown1
    Prodigy 140 points

    Hi Ryan,

    thank you for reply. I found this section (static BTPSCONST Frequency_Settings_t Frequency_Settings[]) in HAL.c, too. To avoid future misunderstandings it would be better to change the 25MHz enum in the HRDWCFG.h-file. Thank you for the tip to change the value to 762 to increase the system frequency around 25MHz. How did you calculate this value?

    And an other question. To have an stable system frequency, is an external source clock with 32kHz enough, or it would be better to select a high speed clock?

    Regards,
    Constantin

  • 0 in reply to Constantin Jacob
    TI__Guru**** 202256 points
    Hi Constantin,

    Fdco = (N+1)*FLLRef = (762+1)*32768 = 25 MHz. A LFXT is adequate as the FLL reference clock, but a HFXT can alternatively be directly sourced to avoid the FLL and multiplier.

    Regards,
    Ryan