Compiler/CC2640R2F: CCS generated binary seems incomplete

Valerian G

Part Number: CC2640R2F
Other Parts Discussed in Thread: UNIFLASH

Tool/software: TI C/C++ Compiler

Hi,

I have recently converted part of my application code into a library, and I'm now having issues flashing my new binary.

Most of the time, my application works perfectly, whether I flash it with CCS or Uniflash. However, when flashing the device after an erase (Uniflash) or a Mass Erase (CSS), the loaded binary seems to be corrupted.

After loading on a clean chip using CCS, the application boots and run normally. However, after the first reset (debugger reset or hard reset), the device doesn't boot anymore.

Reflashing the device doesn't help, and I get stuck into the same sequence:

First boot successful
Hard reset / debugger reset
Device doesn't boot anymore.

The only way to get out of this loop is to flash an older version of my application, and then to flash my latest without erasing the flash entirely (CCS flash or Uniflash with 'Necessary Sectors Only' erase settings)

Thanks for your help.

Best regards,

Val

over 8 years ago

0 RachelP over 8 years ago

TI__Genius 12815 points

Hi Val,

What sample application are you starting development from? What guide did you follow to convert your project into a library?

0 Valerian G over 8 years ago in reply to RachelP

Intellectual 420 points

Hi RachelP
I used the SimplePeripheral_cc2640r2_app as an example. I couldn't find a guide to convert my app to a lib, so I followed instructions provided by Ki-Soo Lee (TI Employee).
My binary is made of:
- My App
- My Custom Library
- The Ti Ble Stack 3.1 Library
Best

0 RachelP over 8 years ago in reply to Valerian G

TI__Genius 12815 points

Hi Val,

Thanks for that explanation. You aren't using the Simple Peripheral OAD project right? Did you have to make any changes to the linker file?

0 Valerian G over 8 years ago in reply to RachelP

Intellectual 420 points

Hi RachelP

No, I'm using the SimplePeripheral (notOAD) linker File. I made small changes to repurpose the Aux Memory (Sensor Controller) as additional RAM.

I've attached the Linker file if you want to check it.

Thanks,

Best,

Val

Attached:

Fullscreen cc26xx_app_auxMem.cmd.txt Download

/******************************************************************************

 @file       cc26xx_app.cmd

 @brief Custom linker configuration file the Pamsys Platform project

        Imported Symbols
        Note: Linker defines are located in the CCS IDE project by placing them
        in
        Properties->Build->Linker->Advanced Options->Command File Preprocessing.

        CACHE_AS_RAM:       Disable system cache to be used as GPRAM for
                            additional volatile memory storage.
        CCxxxxROM:          Device Name (e.g. CC2650). In order to define this
                            symbol, the tool chain requires that it be set to
                            a specific value, but in fact, the actual value does
                            not matter as it is not used in the linker control
                            file. The only way this symbol is used is based on
                            whether it is defined or not, not its actual value.
                            There are other linker symbols that do specifically
                            set their value to 1 to indicate R1, and 2 to
                            indicate R2, and these values are checked and do make
                            a difference. However, it would appear confusing if
                            the device name's value did not correspond to the
                            value set in other linker symbols. In order to avoid
                            this confusion, when the symbol is defined, it should
                            be set to the value of the device's ROM that it
                            corresponds so as to look and feel consistent. Please
                            note that a device name symbol should always be
                            defined to avoid side effects from default values
                            that may not be correct for the device being used.
        ICALL_RAM0_START:   RAM start of BLE stack.
        ICALL_STACK0_START: Flash start of BLE stack.
        PAGE_AlIGN:         Align BLE stack boundary to a page boundary.
                            Aligns to Flash word boundary by default.

 Group: CMCU, SCS
 Target Device: CC2640R2

 ******************************************************************************

 Copyright (c) 2013-2017, Texas Instruments Incorporated
 All rights reserved.

 Redistribution and use in source and binary forms, with or without
 modification, are permitted provided that the following conditions
 are met:

 *  Redistributions of source code must retain the above copyright
    notice, this list of conditions and the following disclaimer.

 *  Redistributions in binary form must reproduce the above copyright
    notice, this list of conditions and the following disclaimer in the
    documentation and/or other materials provided with the distribution.

 *  Neither the name of Texas Instruments Incorporated nor the names of
    its contributors may be used to endorse or promote products derived
    from this software without specific prior written permission.

 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
 THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
 PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
 CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
 EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
 PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
 OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
 WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
 OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
 EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

 ******************************************************************************
 Release Name: simplelink_cc2640r2_sdk_01_50_00_58
 Release Date: 2017-10-17 18:09:51
 *****************************************************************************/

/*******************************************************************************
 * CCS Linker configuration
 */

/* Retain interrupt vector table variable                                    */
--retain=g_pfnVectors
/* Override default entry point.                                             */
--entry_point ResetISR
/* Suppress warnings and errors:                                             */
/* - 10063: Warning about entry point not being _c_int00                     */
/* - 16011, 16012: 8-byte alignment errors. Observed when linking in object  */
/*   files compiled using Keil (ARM compiler)                                */
--diag_suppress=10063,16011,16012

/* The following command line options are set as part of the CCS project.    */
/* If you are building using the command line, or for some reason want to    */
/* define them here, you can uncomment and modify these lines as needed.     */
/* If you are using CCS for building, it is probably better to make any such */
/* modifications in your CCS project and leave this file alone.              */
/*                                                                           */
/* --heap_size=0                                                             */
/* --stack_size=256                                                          */
/* --library=rtsv7M3_T_le_eabi.lib                                           */

/* The starting address of the application.  Normally the interrupt vectors  */
/* must be located at the beginning of the application. Flash is 128KB, with */
/* sector length of 4KB                                                      */

/*******************************************************************************
 * Memory Sizes
 */
#define FLASH_BASE   0x00000000
#define GPRAM_BASE   0x11000000
#define RAM_BASE     0x20000000
#define ROM_BASE     0x10000000

#ifdef CC26X0ROM
  #define FLASH_SIZE 0x00020000
  #define GPRAM_SIZE 0x00002000
  #define RAM_SIZE   0x00005000
  #define ROM_SIZE   0x0001C000
#endif /* CC26X0ROM */

#ifdef AUX_AS_RAM
	#define AUX_RAM_BASE            0x400E0000
	#define AUX_RAM_SIZE            0x800
#endif /* AUX_AS_RAM */

/*******************************************************************************
 * Memory Definitions
 ******************************************************************************/

/*******************************************************************************
 * RAM
 */

#ifdef CC26X0ROM
  #if CC26X0ROM == 2
    #define RESERVED_RAM_SIZE 0x00000C00
  #elif CC26X0ROM == 1
    #define RESERVED_RAM_SIZE 0x00000718
  #endif /* CC26X0ROM */
#endif /* CC26X0ROM */

#define RAM_START             RAM_BASE

#ifdef ICALL_RAM0_START
  #define RAM_END             (ICALL_RAM0_START - 1)
#else
  #define RAM_END             (RAM_START + RAM_SIZE - RESERVED_RAM_SIZE - 1)
#endif /* ICALL_RAM0_START */

/*******************************************************************************
 * Flash
 */

#define FLASH_START                FLASH_BASE
#define WORD_SIZE                  4

#ifdef CC26X0ROM
  #define PAGE_SIZE                0x1000
#endif /* CC26X0ROM */

#ifdef PAGE_ALIGN
  #define FLASH_MEM_ALIGN          PAGE_SIZE
#else
  #define FLASH_MEM_ALIGN          WORD_SIZE
#endif /* PAGE_ALIGN */

#ifdef CC26X0ROM
  #define PAGE_MASK                0xFFFFF000
#endif /* CC26X0ROM */

/* The last Flash page is reserved for the application. */
#define NUM_RESERVED_FLASH_PAGES   1
#define RESERVED_FLASH_SIZE        (NUM_RESERVED_FLASH_PAGES * PAGE_SIZE)

/* Check if page alingment with the Stack image is required.  If so, do not link
 * into a page shared by the Stack.
 */
#ifdef ICALL_STACK0_START
  #ifdef PAGE_ALIGN
    #define ADJ_ICALL_STACK0_START (ICALL_STACK0_START * PAGE_MASK)
  #else
    #define ADJ_ICALL_STACK0_START ICALL_STACK0_START
  #endif /* PAGE_ALIGN */

  #define FLASH_END                (ADJ_ICALL_STACK0_START - 1)
#else
  #define FLASH_END                (FLASH_START + FLASH_SIZE - RESERVED_FLASH_SIZE - 1)
#endif /* ICALL_STACK0_START */

#define FLASH_LAST_PAGE_START      (FLASH_SIZE - PAGE_SIZE)

/*******************************************************************************
 * Stack
 */

/* Create global constant that points to top of stack */
/* CCS: Change stack size under Project Properties    */
__STACK_TOP = __stack + __STACK_SIZE;

/*******************************************************************************
 * GPRAM
 */

#ifdef CACHE_AS_RAM
  #define GPRAM_START GPRAM_BASE
  #define GPRAM_END   (GPRAM_START + GPRAM_SIZE - 1)
#endif /* CACHE_AS_RAM */

/*******************************************************************************
 * Main arguments
 */

/* Allow main() to take args */
/* --args 0x8 */

/*******************************************************************************
 * ROV
 * These symbols are used by ROV2 to extend the valid memory regions on device.
 * Without these defines, ROV will encounter a Java exception when using an
 * autosized heap. This is a posted workaround for a known limitation of
 * RTSC/rta. See: https://bugs.eclipse.org/bugs/show_bug.cgi?id=487894
 *
 * Note: these do not affect placement in RAM or FLASH, they are only used
 * by ROV2, see the BLE Stack User's Guide for more info on a workaround
 * for ROV Classic
 *
 */
__UNUSED_SRAM_start__ = 0x20000000;
__UNUSED_SRAM_end__ = 0x20005000;

__UNUSED_FLASH_start__ = 0;
__UNUSED_FLASH_end__ = 0x1FFFF;

/*******************************************************************************
 * System Memory Map
 ******************************************************************************/
MEMORY
{
  /* EDITOR'S NOTE:
   * the FLASH and SRAM lengths can be changed by defining
   * ICALL_STACK0_START or ICALL_RAM0_START in
   * Properties->ARM Linker->Advanced Options->Command File Preprocessing.
   */

  /* Application stored in and executes from internal flash */
  FLASH (RX) : origin = FLASH_START, length = (FLASH_END - FLASH_START + 1)

  /* CCFG Page, contains .ccfg code section and some application code. */
  FLASH_LAST_PAGE (RX) :  origin = FLASH_LAST_PAGE_START, length = PAGE_SIZE

  /* Application uses internal RAM for data */
  SRAM (RWX) : origin = RAM_START, length = (RAM_END - RAM_START + 1)

  #ifdef CACHE_AS_RAM
      GPRAM(RWX) : origin = GPRAM_START, length = GPRAM_SIZE
  #endif /* CACHE_AS_RAM */

  #ifdef AUX_AS_RAM
	AUX_RAM (RWX) : origin = AUX_RAM_BASE, length = AUX_RAM_SIZE
  #endif /* AUX_AS_RAM */
}

/*******************************************************************************
 * Section Allocation in Memory
 ******************************************************************************/
SECTIONS
{
  .intvecs        :   >  FLASH_START
  .text           :   >> FLASH | FLASH_LAST_PAGE
  .const          :   >> FLASH | FLASH_LAST_PAGE
  .constdata      :   >> FLASH | FLASH_LAST_PAGE
  .rodata         :   >> FLASH | FLASH_LAST_PAGE
  .cinit          :   >  FLASH | FLASH_LAST_PAGE
  .pinit          :   >> FLASH | FLASH_LAST_PAGE
  .init_array     :   >  FLASH | FLASH_LAST_PAGE
  .emb_text       :   >> FLASH | FLASH_LAST_PAGE
  .snvSectors     :   > FLASH (HIGH)
  .ccfg           :   >  FLASH_LAST_PAGE (HIGH)

  GROUP > SRAM
  {
    .data
    #ifndef CACHE_AS_RAM
    .bss
    #endif /* CACHE_AS_RAM */
    .vtable
    .vtable_ram
    vtable_ram
    .sysmem
    .nonretenvar
    /*This keeps ll.o objects out of GPRAM, if no ll.o would be placed here
      the warning #10068 is supressed.*/
    #ifdef CACHE_AS_RAM
    ll_bss
    {
      --library=cc2640_ll_*.a<ll.o> (.bss)
    }
    #endif /* CACHE_AS_RAM */
  } LOAD_END(heapStart)

  .stack            :   >  SRAM (HIGH) LOAD_START(heapEnd)

    #ifdef CACHE_AS_RAM

    .bss :
    {
      *(.bss)
    } > GPRAM
  #endif /* CACHE_AS_RAM */

  #ifdef AUX_AS_RAM
  reorganized_into_auxram
  {

    icall.obj(.data)
    Pamsys_TiLib.lib<battery.obj>(.data)
    //battery.obj(.bss)
    Pamsys_TiLib.lib<hmi.obj>(.data)
    //hmi.obj(.bss)
    Pamsys_TiLib.lib<McuLink.obj>(.data)
    Pamsys_TiLib.lib<McuLink.obj>(.bss)
    Pamsys_TiLib.lib<ble_cm.obj>(.data)
    Pamsys_TiLib.lib<ble_cm.obj>(.bss)
    //nvs.obj(.data)
    //nvs.obj(.bss)
    Pamsys_TiLib.lib<cmsis_i2c.obj>(.data)
    //cmsis_i2c.obj(.bss)
    Pamsys_TiLib.lib<BiosensicsProfile.obj>(.data)
    //BiosensicsProfile.obj(.bss)
   	Pamsys_TiLib.lib<peripheral.obj>(.data)
    //Peripheral.obj(.bss)
  } > AUX_RAM
  #endif/* AUX_AS_RAM */
}

0 RachelP over 8 years ago in reply to Valerian G

TI__Genius 12815 points

Hi Val,

Does the unmodified Simple Peripheral from the SimpleLink CC2640R2 SDK v1.50.00.58 work as expected? The linker file seems ok to me so, as long as you aren't getting any linking errors, it should be ok.

I'm curious about this statement you made in your original post: "then to flash my latest without erasing the flash entirely (CCS flash or Uniflash with 'Necessary Sectors Only' erase settings)". Can you do this in Uniflash with the Verbose option selected? Please attach your Console output.

0 Valerian G over 8 years ago in reply to RachelP

Intellectual 420 points

Attached:

Fullscreen Flash_Failure.txt Download

[2018-02-21 17:15:39] [INFO] Cortex_M3_0: GEL Output: Memory Map Initialization Complete.
[2018-02-21 17:15:41] [INFO] Cortex_M3_0: Flashloader: Verbose output enabled.
[2018-02-21 17:15:41] [INFO] Cortex_M3_0: MassErase(): Initializing.
[2018-02-21 17:15:41] [INFO] Cortex_M3_0: MassErase(): Issuing Board Reset.
[2018-02-21 17:15:43] [INFO] Cortex_M3_0: MassErase(): Mass erase complete.
[2018-02-21 17:15:55] [INFO] Cortex_M3_0: GEL Output: Memory Map Initialization Complete.
[2018-02-21 17:15:57] [INFO] Cortex_M3_0: Flashloader: Verbose output enabled.
[2018-02-21 17:15:59] [INFO] Cortex_M3_0: GEL Output: Board Reset Complete.
[2018-02-21 17:15:59] [INFO] Cortex_M3_0: Writing Flash @ Address 0x00000000 of Length 0x00001400
[2018-02-21 17:15:59] [INFO] Cortex_M3_0: Performing bank erase
[2018-02-21 17:15:59] [INFO] Cortex_M3_0: Loading flashloader to target: FlashLoaderCC26x0.out
[2018-02-21 17:16:00] [INFO] Cortex_M3_0: Loading flashloader to target: FlashLoaderCC26x0.out
[2018-02-21 17:16:00] [INFO] Cortex_M3_0: Chunk 1: addr=0x00000000, length=4096 (using block 0)
[2018-02-21 17:16:00] [INFO] Cortex_M3_0: Chunk 2: addr=0x00001000, length=1024 (using block 1)
[2018-02-21 17:16:00] [INFO] Cortex_M3_0: Writing Flash @ Address 0x00001400 of Length 0x00007c00
[2018-02-21 17:16:00] [INFO] Cortex_M3_0: Chunk 1: addr=0x00001400, length=4096 (using block 0)
[2018-02-21 17:16:01] [INFO] Cortex_M3_0: Chunk 2: addr=0x00002400, length=4096 (using block 1)
[2018-02-21 17:16:01] [INFO] Cortex_M3_0: Chunk 3: addr=0x00003400, length=4096 (using block 0)
[2018-02-21 17:16:01] [INFO] Cortex_M3_0: Chunk 4: addr=0x00004400, length=4096 (using block 1)
[2018-02-21 17:16:01] [INFO] Cortex_M3_0: Chunk 5: addr=0x00005400, length=4096 (using block 0)
[2018-02-21 17:16:01] [INFO] Cortex_M3_0: Chunk 6: addr=0x00006400, length=4096 (using block 1)
[2018-02-21 17:16:02] [INFO] Cortex_M3_0: Chunk 7: addr=0x00007400, length=4096 (using block 0)
[2018-02-21 17:16:02] [INFO] Cortex_M3_0: Chunk 8: addr=0x00008400, length=3072 (using block 1)
[2018-02-21 17:16:02] [INFO] Cortex_M3_0: Writing Flash @ Address 0x00009000 of Length 0x00007c00
[2018-02-21 17:16:02] [INFO] Cortex_M3_0: Chunk 1: addr=0x00009000, length=4096 (using block 0)
[2018-02-21 17:16:02] [INFO] Cortex_M3_0: Chunk 2: addr=0x0000A000, length=4096 (using block 1)
[2018-02-21 17:16:03] [INFO] Cortex_M3_0: Chunk 3: addr=0x0000B000, length=4096 (using block 0)
[2018-02-21 17:16:03] [INFO] Cortex_M3_0: Chunk 4: addr=0x0000C000, length=4096 (using block 1)
[2018-02-21 17:16:03] [INFO] Cortex_M3_0: Chunk 5: addr=0x0000D000, length=4096 (using block 0)
[2018-02-21 17:16:03] [INFO] Cortex_M3_0: Chunk 6: addr=0x0000E000, length=4096 (using block 1)
[2018-02-21 17:16:03] [INFO] Cortex_M3_0: Chunk 7: addr=0x0000F000, length=4096 (using block 0)
[2018-02-21 17:16:03] [INFO] Cortex_M3_0: Chunk 8: addr=0x00010000, length=3072 (using block 1)
[2018-02-21 17:16:04] [INFO] Cortex_M3_0: Writing Flash @ Address 0x00010c00 of Length 0x000029cc
[2018-02-21 17:16:04] [INFO] Cortex_M3_0: Chunk 1: addr=0x00010C00, length=4096 (using block 0)
[2018-02-21 17:16:04] [INFO] Cortex_M3_0: Chunk 2: addr=0x00011C00, length=4096 (using block 1)
[2018-02-21 17:16:04] [INFO] Cortex_M3_0: Chunk 3: addr=0x00012C00, length=2508 (using block 0)
[2018-02-21 17:16:04] [INFO] Cortex_M3_0: Writing Flash @ Address 0x0001e000 of Length 0x00001000
[2018-02-21 17:16:04] [INFO] Cortex_M3_0: Chunk 1: addr=0x0001E000, length=4096 (using block 1)
[2018-02-21 17:16:05] [SUCCESS] Program Load completed successfully.

Fullscreen Flash_alwaysGood.txt Download

[2018-02-21 17:24:14] [INFO] Cortex_M3_0: GEL Output: Memory Map Initialization Complete.
[2018-02-21 17:24:16] [INFO] Cortex_M3_0: Flashloader: Verbose output enabled.
[2018-02-21 17:24:16] [INFO] Cortex_M3_0: MassErase(): Initializing.
[2018-02-21 17:24:16] [INFO] Cortex_M3_0: MassErase(): Issuing Board Reset.
[2018-02-21 17:24:18] [INFO] Cortex_M3_0: MassErase(): Mass erase complete.
[2018-02-21 17:24:31] [INFO] Cortex_M3_0: GEL Output: Memory Map Initialization Complete.
[2018-02-21 17:24:33] [INFO] Cortex_M3_0: Flashloader: Verbose output enabled.
[2018-02-21 17:24:36] [INFO] Cortex_M3_0: GEL Output: Board Reset Complete.
[2018-02-21 17:24:36] [INFO] Cortex_M3_0: Writing Flash @ Address 0x00000000 of Length 0x00001400
[2018-02-21 17:24:36] [INFO] Cortex_M3_0: Loading flashloader to target: FlashLoaderCC26x0.out
[2018-02-21 17:24:37] [INFO] Cortex_M3_0: Chunk 1: addr=0x00000000, length=4096 (using block 0)
[2018-02-21 17:24:37] [INFO] Cortex_M3_0: Chunk 2: addr=0x00001000, length=1024 (using block 1)
[2018-02-21 17:24:37] [INFO] Cortex_M3_0: Writing Flash @ Address 0x00001400 of Length 0x00007c00
[2018-02-21 17:24:37] [INFO] Cortex_M3_0: Chunk 1: addr=0x00001400, length=4096 (using block 0)
[2018-02-21 17:24:37] [INFO] Cortex_M3_0: Chunk 2: addr=0x00002400, length=4096 (using block 1)
[2018-02-21 17:24:38] [INFO] Cortex_M3_0: Chunk 3: addr=0x00003400, length=4096 (using block 0)
[2018-02-21 17:24:38] [INFO] Cortex_M3_0: Chunk 4: addr=0x00004400, length=4096 (using block 1)
[2018-02-21 17:24:38] [INFO] Cortex_M3_0: Chunk 5: addr=0x00005400, length=4096 (using block 0)
[2018-02-21 17:24:38] [INFO] Cortex_M3_0: Chunk 6: addr=0x00006400, length=4096 (using block 1)
[2018-02-21 17:24:38] [INFO] Cortex_M3_0: Chunk 7: addr=0x00007400, length=4096 (using block 0)
[2018-02-21 17:24:39] [INFO] Cortex_M3_0: Chunk 8: addr=0x00008400, length=3072 (using block 1)
[2018-02-21 17:24:39] [INFO] Cortex_M3_0: Writing Flash @ Address 0x00009000 of Length 0x00007c00
[2018-02-21 17:24:39] [INFO] Cortex_M3_0: Chunk 1: addr=0x00009000, length=4096 (using block 0)
[2018-02-21 17:24:39] [INFO] Cortex_M3_0: Chunk 2: addr=0x0000A000, length=4096 (using block 1)
[2018-02-21 17:24:39] [INFO] Cortex_M3_0: Chunk 3: addr=0x0000B000, length=4096 (using block 0)
[2018-02-21 17:24:40] [INFO] Cortex_M3_0: Chunk 4: addr=0x0000C000, length=4096 (using block 1)
[2018-02-21 17:24:40] [INFO] Cortex_M3_0: Chunk 5: addr=0x0000D000, length=4096 (using block 0)
[2018-02-21 17:24:40] [INFO] Cortex_M3_0: Chunk 6: addr=0x0000E000, length=4096 (using block 1)
[2018-02-21 17:24:40] [INFO] Cortex_M3_0: Chunk 7: addr=0x0000F000, length=4096 (using block 0)
[2018-02-21 17:24:40] [INFO] Cortex_M3_0: Chunk 8: addr=0x00010000, length=3072 (using block 1)
[2018-02-21 17:24:40] [INFO] Cortex_M3_0: Writing Flash @ Address 0x00010c00 of Length 0x00002c04
[2018-02-21 17:24:41] [INFO] Cortex_M3_0: Chunk 1: addr=0x00010C00, length=4096 (using block 0)
[2018-02-21 17:24:41] [INFO] Cortex_M3_0: Chunk 2: addr=0x00011C00, length=4096 (using block 1)
[2018-02-21 17:24:41] [INFO] Cortex_M3_0: Chunk 3: addr=0x00012C00, length=3076 (using block 0)
[2018-02-21 17:24:41] [INFO] Cortex_M3_0: Writing Flash @ Address 0x0001d000 of Length 0x00002000
[2018-02-21 17:24:41] [INFO] Cortex_M3_0: Chunk 1: addr=0x0001D000, length=4096 (using block 1)
[2018-02-21 17:24:42] [INFO] Cortex_M3_0: Chunk 2: addr=0x0001E000, length=4096 (using block 0)
[2018-02-21 17:24:42] [INFO] Cortex_M3_0: Writing Flash @ Address 0x0001ffa8 of Length 0x00000058
[2018-02-21 17:24:42] [INFO] Cortex_M3_0: Chunk 1: addr=0x0001FFA8, length=88 (using block 1)
[2018-02-21 17:24:42] [SUCCESS] Program Load completed successfully.

Fullscreen Flash_Success.txt Download

2018-02-21 17:14:09] [INFO] Cortex_M3_0: GEL Output: Memory Map Initialization Complete.
[2018-02-21 17:14:11] [INFO] Cortex_M3_0: Flashloader: Verbose output enabled.
[2018-02-21 17:14:13] [INFO] Cortex_M3_0: GEL Output: Board Reset Complete.
[2018-02-21 17:14:13] [INFO] Cortex_M3_0: Writing Flash @ Address 0x00000000 of Length 0x00001400
[2018-02-21 17:14:13] [INFO] Cortex_M3_0: Loading flashloader to target: FlashLoaderCC26x0.out
[2018-02-21 17:14:14] [INFO] Cortex_M3_0: Chunk 1: addr=0x00000000, length=4096 (using block 0)
[2018-02-21 17:14:14] [INFO] Cortex_M3_0: Chunk 2: addr=0x00001000, length=1024 (using block 1)
[2018-02-21 17:14:14] [INFO] Cortex_M3_0: Writing Flash @ Address 0x00001400 of Length 0x00007c00
[2018-02-21 17:14:14] [INFO] Cortex_M3_0: Chunk 1: addr=0x00001400, length=4096 (using block 0)
[2018-02-21 17:14:15] [INFO] Cortex_M3_0: Chunk 2: addr=0x00002400, length=4096 (using block 1)
[2018-02-21 17:14:15] [INFO] Cortex_M3_0: Chunk 3: addr=0x00003400, length=4096 (using block 0)
[2018-02-21 17:14:15] [INFO] Cortex_M3_0: Chunk 4: addr=0x00004400, length=4096 (using block 1)
[2018-02-21 17:14:15] [INFO] Cortex_M3_0: Chunk 5: addr=0x00005400, length=4096 (using block 0)
[2018-02-21 17:14:15] [INFO] Cortex_M3_0: Chunk 6: addr=0x00006400, length=4096 (using block 1)
[2018-02-21 17:14:16] [INFO] Cortex_M3_0: Chunk 7: addr=0x00007400, length=4096 (using block 0)
[2018-02-21 17:14:16] [INFO] Cortex_M3_0: Chunk 8: addr=0x00008400, length=3072 (using block 1)
[2018-02-21 17:14:16] [INFO] Cortex_M3_0: Writing Flash @ Address 0x00009000 of Length 0x00007c00
[2018-02-21 17:14:16] [INFO] Cortex_M3_0: Chunk 1: addr=0x00009000, length=4096 (using block 0)
[2018-02-21 17:14:16] [INFO] Cortex_M3_0: Chunk 2: addr=0x0000A000, length=4096 (using block 1)
[2018-02-21 17:14:16] [INFO] Cortex_M3_0: Chunk 3: addr=0x0000B000, length=4096 (using block 0)
[2018-02-21 17:14:17] [INFO] Cortex_M3_0: Chunk 4: addr=0x0000C000, length=4096 (using block 1)
[2018-02-21 17:14:17] [INFO] Cortex_M3_0: Chunk 5: addr=0x0000D000, length=4096 (using block 0)
[2018-02-21 17:14:17] [INFO] Cortex_M3_0: Chunk 6: addr=0x0000E000, length=4096 (using block 1)
[2018-02-21 17:14:17] [INFO] Cortex_M3_0: Chunk 7: addr=0x0000F000, length=4096 (using block 0)
[2018-02-21 17:14:17] [INFO] Cortex_M3_0: Chunk 8: addr=0x00010000, length=3072 (using block 1)
[2018-02-21 17:14:18] [INFO] Cortex_M3_0: Writing Flash @ Address 0x00010c00 of Length 0x000029cc
[2018-02-21 17:14:18] [INFO] Cortex_M3_0: Chunk 1: addr=0x00010C00, length=4096 (using block 0)
[2018-02-21 17:14:18] [INFO] Cortex_M3_0: Chunk 2: addr=0x00011C00, length=4096 (using block 1)
[2018-02-21 17:14:18] [INFO] Cortex_M3_0: Chunk 3: addr=0x00012C00, length=2508 (using block 0)
[2018-02-21 17:14:18] [INFO] Cortex_M3_0: Writing Flash @ Address 0x0001e000 of Length 0x00001000
[2018-02-21 17:14:18] [INFO] Cortex_M3_0: Chunk 1: addr=0x0001E000, length=4096 (using block 1)
[2018-02-21 17:14:19] [SUCCESS] Program Load completed successfully.

Hi RachelP,

Thanks for getting back to me.

I've attached the following Uniflash Console outputs:

Flash_Success: Flash my latest binary with Erase Settings "Necessary Sectors Only"

Flash Failure: Flash my latest binary after a Flash Mass Erase

The device boots properly once, and then crash
Unable to flash my latest build, no matter what erase settings I use

Flash_alwaysGood.txt: Flash a old binary after Mass Erase
- The device works fine, and I can now flash my latest build with the "Necessary Sectors Only" settings

By looking at the log, I've noticed the following difference between my latest build and my old binary:

[2018-02-21 17:24:42] [INFO] Cortex_M3_0: Writing Flash @ Address 0x0001ffa8 of Length 0x00000058
[2018-02-21 17:24:42] [INFO] Cortex_M3_0: Chunk 1: addr=0x0001FFA8, length=88 (using block 1)
[2018-02-21 17:24:42] [SUCCESS] Program Load completed successfully.

It looks like my latest build doesn't override the CCFG/Last page section.

Note: I'm using the Non Volatile Storage module for the BLE stack and for my Application

Thanks

0 Sean2 over 8 years ago in reply to Valerian G

TI__Mastermind 33460 points

Hello,

Looking at your logs, it looks some of the sessions are not flashing the CCFG.
If your device does not contain a valid ccfg it will boot into serial bootloader mode which will prevent the device from booting the flash image.

It is important to ensure that your hex image contains the CCFG sector.

0 Valerian G over 8 years ago in reply to Sean2

Intellectual 420 points

Hi Sean,

This looks like a possible explanation for my issues.

How do I include the CCFG sector into my hex image? How can I easily confirm I'm booting into the serial bootloader?

Thanks,

0 Sean2 over 8 years ago in reply to Valerian G

TI__Mastermind 33460 points

Hi,

The ccfg is defined in ccfg_app_ble.c, be sure that your application includes this file. You should have a .ccfg section in your map file or an associated object (.o) in your map file after building.

The ccfg must be linked to the last page of flash (0x1FFA8 specifically), so you can manually inspect your generated hex files and be sure they an include the last page. Check that your linker file or any binary post processing is not chopping out the CCFG.

The device will automatically boot into the bootloader mode if there is no CCFG present. You could test this by sending it a bootloader command over serial. These are detailed in the TRM www.ti.com/.../swcu117

0 Valerian G over 8 years ago in reply to Sean2

Intellectual 420 points

Hi Sean,

I've added ccfg_app_ble.c to my application, and this seems to resolve my problems. I can now see that Uniflash is always programming the CCFG.

Just to satisfy my curiosity: I had the ccfg_app_ble.c included in my custom library (cf 3rd post). It seems the file wasn't included (or was optimized out) during linking. Do you know why?

Thanks for your help

Bluetooth®︎

Bluetooth forum

Compiler/CC2640R2F: CCS generated binary seems incomplete