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CC2640R2F: simple_peripheral example with CACHE_AS_RAM enabled go on infinite loop

Part Number: CC2640R2F
Other Parts Discussed in Thread: LAUNCHXL-CC2640R2, CC2640, BLE-STACK,

Hello,

we have to use the 8KB of cache as GPRAM in order to use more heap space. 

Using this guide on chapter "Using the Cache as RAM"
http://software-dl.ti.com/lprf/simplelink_cc2640r2_sdk/1.30.00.25/exports/docs/blestack/ble_sw_dev_guide/html/cc2640/platform.html#using-the-cache-as-ram

we compiled the SimplePeripheral example but, running the example in debug, it doesn't break on main. Suspending the debug (ALT-F8) we see firmware stoppend at address 10001cb6 in an infinite loop.

Next the detail of the IDE and HW configuration :

CCS: version 8.0.0.00016
SDK: simplelink_cc2640r2_sdk_1_50_00_58
Compiler: v16.9.6 LTS
XDCTools: 3.50.3.33
Project: C:\ti\simplelink_cc2640r2_sdk_1_50_00_58\examples\rtos\CC2640R2_LAUNCHXL\blestack\simple_peripheral
Board: LAUNCHXL-CC2640R2

Here the disassembly of the loop:

10001ca2:   F0404000            orr        r0, r0, #0x80000000
10001ca6:   F0404000            orr        r0, r0, #0x80000000
10001caa:   6260                str        r0, [r4, #0x24]
10001cac:   F7FFFA0E            bl         #0x100010cc
10001cb0:   F7FFF9C5            bl         #0x1000103e
10001cb4:   E7FE                b          #0x10001cb4
10001cb6:   E7FE                b          #0x10001cb6
10001cb8:   E7FE                b          #0x10001cb8
10001cba:   4908                ldr        r1, [pc, #0x20]
10001cbc:   2001                movs       r0, #1
10001cbe:   60C8                str        r0, [r1, #0xc]
10001cc0:   4770                bx         lr

Do you have any note to solve this problem ?

Thank you in advance

  • Hi,

    I see that the document version that you linked is for the SDK 1.30.00.25. But it looks like the SDK version that you use is 1.50.00.58. Can you please check the 1.50.00.58 version of the document here: dev.ti.com/.../memory_management.html And ensure that the changes that you made match up with exactly what this document says, as this is the version that goes with your particular SDK version?

    Have you made any other changes to simple_peripheral or is this with the unmodified version (other than cache as RAM of course)?
    Were there additional objects in .bss that you worked to move over, or did you just leave it at the defaults (this is in regards to step 5 of the instructions).
    Did you make sure to use "Rebuild" instead of just "Build" after you made your changes?

    Regards,
    Katie
  • Hi,
    I read also the 1.50.00.58 document, and both show the same steps.
    We applied only the modification in step 1, because we found the others already made in the example imported from sdk.
    There are not other object in .bss area to move because we are using the example, without change it than the CACHE_AS_RAM related items.
    We rebuild the project.

    Thank you
    regards
  • Hi,

    When I tested this, I found that simple_peripheral did not already have step 4 done (adding linker predefined symbol) nor step 3 compiler predefined symbol CACHE_AS_RAM. Did you do both of these steps? You can find info on accessing predefined symbols here: dev.ti.com/.../developing_in_ccs.html

    Regards,
    Katie
  • Hi Katie,
    next you can see the steps we did to import and configure the project :

    - imported simple_periperal_cc2640r2lp_app
    - applied the 1st patch in ccfg_app_ble.c file (not present)
    - not applied the 2nd patch, both the white boxes, because already presents (row 185 up to 194 main.c file)
    - applied 3rd and 4th step
    - step 5 skipped because we found this section into the cc26xx_app.cmd file :
    "
    #ifdef CACHE_AS_RAM
    ll_bss
    {
    --library=cc2640_ll_*.a<ll.o> (.bss)
    }
    #endif /* CACHE_AS_RAM */
    "
    the step 5 report this warning : 10068-D no matching section"
    - disabled code optimization in app and stack project, from 4 to off, to verify the code in debug

    We found two threads in the TI forum which may be linked to our problem, it could be ?

    - e2e.ti.com/.../590873
    - e2e.ti.com/.../2517518

    next week we will try to change compiler to the 16.9.3 and to enable optimization.

    thank you
    regards
  • Hi Katie,
    next you can read the steps we did and the results :

    removed ccs8 and the sdk sdk_1_50_00_58 installed from the ccs menu
    installed CCS7.3.0.00019_win32
    Installed SDK simplelink_cc2640r2_2 using installation file simplelink_cc2640r2_sdk_1_50_00_58
    removed the TI compiler 16.9.8 and installed the 16.9.3 LTS needed to grant the compatibility with the simplelink_cc2640r2_sdk_1_50_00_58.
    imported simple_peripheral_cc2640r2lp_app

    applied the modification listed into
    dev.ti.com/.../memory_management.html

    step 1: done
    step 2: already done in main.c
    step 7: already done in cc26xx_app.cmd

    with this configuration, the simple_peripheral_cc2640r2lp_app run fine on the evaluation board, also with CACHE_AS_RAM enabled
    The same binary doesnt' run on our custom board based on 5x5 package.

    Enabling CC2640R2DK_5XD to use the right porting file, we discover that the directory
    C:\ti\simplelink_cc2640r2_sdk_1_50_00_58\source\ti\blestack\target\cc2640r2em
    is not present.
    The same directory was present in the sdk_1_50_00_58 installed from internal menu of the CCS8

    Copying the directory from SDK 1_40_00_45 and rebuilding, the firmware run fine on our custom board, with minor problems linked to the pinmux. This configuration run also with the CACH_AS_RAM enabled.

    Disabling the optimization level from 4 to off in both projects (app and stack), the firmware dead on icall_abort function.

    Conclusion
    ----------------------------------
    - At the end of the tests, we are confident about the example firmware run fine only with the perfect match of the CCS release, compiler and XDCtools, as indicate on C:/ti/simplelink_cc2640r2_sdk_1_50_00_58/release_notes_simplelink_cc2640r2_sdk_1_50_00_58.html#dependencies.
    - It is not very crear why the directory C:\ti\simplelink_cc2640r2_sdk_1_50_00_58\source\ti\blestack\target\cc2640r2em is not present on the cc2640r2_sdk_1_50_00_58 installed manually
    - Disabling the code optimization, in order to debug the code placing breakpoint in a syncronized source line to the asm code, the firmware crash in icall_abort


    Please, could you confirm these results, helping us to develop the application starting from a stable IDE+compiler ?
    Could you confirm us that it is not guaranteed any firmware made with different CCS and Compiler release from the versione listed on the release notes ?
    Also, do you have some Tips & tricks to debug the code with optimization level = off ?

    best regards
  • Hi,

    my understandig is that the following questions need to be answered:

    1. Do we need to keep the project stuck to a specific version of compiler? Which is the right one?
    2. TI example simple_peripheral_cc2640r2lp_app seems specific for 7x7 package (with SDK 1_50_00_58). To make it working on 5x5 we had to copy few files from previous SDK 1_40_00_45. Is that the  correct way to proceed? What's TI recommendation?
    3. Enabling CACHE_AS_RAM and using optimized code  ("4 Whole program optimization") seems working properly. Disabling code optimization to debug it doesn’t work anymore. Any suggestion on how to enable debugging?

    best regards

  • Hi,

    I unfortunately experienced the same identical issues.

    And in my case the situation is aggravated by the need to use cache as ram in a system with OAD (simple peripheral application).

    Unfortunately, TI quickly releases new versions of sdk, but always forgets to check well aspects of detail like this, which in real applications are very useful (for example full debug should be always available in a development environment and functionality should not be guaranteed only with optimization enabled, or a guided procedure should be verified working at least on evaluation board).

    Best regards

  • Hi Alberto

    I have attempted to answer your questions below:

    #1: Yes, you should always use the exact versions of the tools that are listed in the release notes. While other versions may work flawlessly, they have not been tested or validated by the TI test team and not recommended for development.

    #2: Yes, all examples are created for the 7x7mm package, but can easily be adopted for the 5x5 package with attention given to pin muxing as you have already mentioned. I am not sure why the EM board files have been removed from the SDK, but I will take this up with our R&D team. I recommend porting the old 5x5 board files to the new SDK.

    #3: Disabling optimizations should not result in a crash of any sort. What optimization level are you using? I will try this out with -O0 and simple_peripheral from SDK 1.50.00.58 using the 7x7 board file.
  • Hi Luca,

    Thanks for the feedback, we will report this to our R&D team.
    Regarding the cache as RAM configuration + OAD. This has been confirmed by the field to be working on this thread, (please read through to see confirmation of resolution).

    e2e.ti.com/.../595381

    The key difference is that the CCFG file now exists in the BIM. You will need to change it there to enable cache as RAM.
  • Hi Alberto,

    I was able to reproduce your issue with simple_peripheral by using -O0 and following the steps to enable CACHE_AS_RAM from the BLE-Stack User's guide.

    The issue is that there is an RF command that is not properly aligned.

    You can get around this by changing line 833 of source\ti\blestack\hal\src\target\_common\cc26xx\rf_hal.h to typedef union from PACKED_TYPEDEF_UNION.

    The new code should be:

    typedef union
    
    {
    
     hwOverride_t hwRegOverride;
    
     fwOverride_t fwRegOverride;
    
    } regOverride_t;

    With this change, I am able to observe the device advertising and connect to it using -O0 and CACHE_AS_RAM on Simple Peripheral.

    This is a known issue, and has been reported to our R&D team. It is slated to be fixed in the next quarterly release.

    We are also looking into why this was not gracefully handled between the RF driver and the BLE link layer.

    I hope that this enables your debugging.

  • Hi Sean,

    thanks for your support.
    I know about that thread and I know that CCFG #define modification must be made to the BIM project. But unfortunately it doesn't work both on my custom board and on LAUNCHXL-CC2640R2.

    I will try the solution you suggested to Alberto with -O0 and the workaround on regOverride_t, and I will let you know.

    Thank you

    Best Regards,

    Luca
  • Hi Sean,

    the change in file rf_hal.h that you suggested, solves my problems.
    Now I am able to use customized simple peripheral application with off-chip OAD on my custom board, using 5x5 CC2640R2F, and optimization off.

    Thanks for your support!

    Luca

    PS: is this issue documented somewhere else besides your post in this thread? I spent several days on this issue and it would have been useful to find it documented...
  • Hello Sean,

    Alberto gave your solution a try but it didn't work until he added the #pragma DATA_ALIGN(rfRegTbl, 4) . Now it seems to work.

    Can you confirm that it's ok to use that pragma (no conflict with other things)?

    thanks
    Amjad