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RTOS/CC2640R2F: connection Failed To Be Established (HCI error 0x3E)

Part Number: CC2640R2F
Other Parts Discussed in Thread: LAUNCHXL-CC2640R2

Tool/software: TI-RTOS

SDK: simplelink_cc2640r2_sdk_2_30_00_28

project: RTOS/blestack, simple_peripheral_oad_offchip

IDE: IAR

We have two boards using CC2640R2F SOC and the same codebase to develop our product.

when I using iPhone to establish the connection with our device,...

One of them with 32khz crystal can establish the connection after advertising successfully.

The other without 32khz crystal cannot establish a connection, we have already followed Using 32-kHz Crystal-Less Mode, but still get the failure.

The device receives GAP_LINK_TERMINATED_EVENT(LL_CONN_ESTABLISHMENT_FAILED_TERM) in peripheral.c

show log as below: (attach sniffer log sa attachment)

#000003 [ 0.021 ] INFO: (simple_peripheral_oad_offchip.c:955) SimplePeripheral_init

#000004 [ 0.021 ] INFO: (simple_peripheral_oad_offchip.c:1874) 0xA4DA32067D31

#000005 [ 0.021 ] INFO: (simple_peripheral_oad_offchip.c:1875) =BD Addr

#000006 [ 0.021 ] INFO: (simple_peripheral_oad_offchip.c:1876) GAPRole Initialized

#000007 [ 0.021 ] INFO: (simple_peripheral_oad_offchip.c:1890) Advertising

#000008 [ 12.929 ] INFO: (simple_peripheral_oad_offchip.c:1918) Connected to: 0x6608D1A88643

#000009 [ 13.667 ] INFO: (simple_peripheral_oad_offchip.c:1984) Timed Out

#000010 [ 13.667 ] INFO: (simple_peripheral_oad_offchip.c:1890) Advertising

#000011 [ 13.975 ] INFO: (simple_peripheral_oad_offchip.c:1918) Connected to: 0x6608D1A88643

#000012 [ 14.141 ] INFO: (simple_peripheral_oad_offchip.c:1963) Disconnected

https://e2e.ti.com/cfs-file/__key/communityserver-discussions-components-files/538/3515.cc2640r2f_5F00_connection_5F00_fail.7z

  • Hi

    The error code LL_CONN_ESTABLISHMENT_FAILED_TERM is consistent wit the slave device reporting a supervision timeout.
    This is consistent with the sniffer capture you have posted, as the slave only shows up to one event.

    Can you reproduce this issue on a LaunchPad?
  • No, I can't reproduce this issue on LaunchPad. I flash the same image to LAUNCHXL-CC2640R2, the connection can establish successfully.

  • Have you had the design reviewed? If the issue is not reprocubile on the LaunchPad then likely this an artifact of the HW.
    Can you post your design files?

    Here are some resources for HW design:
    processors.wiki.ti.com/.../CC26xx_HW_Troubleshooting
    processors.wiki.ti.com/.../CC26xx_HW_training_Layout_Considerations.pdf
    processors.wiki.ti.com/.../CC26xx_HW_Checklist
  • HI Sean,

    I am sorry for asking more questions.

    1. How to make sure our codebase configuration(without external 32kHz crystal) is correct?

    1.1

    we just flash image(without external 32Khz crystal) to LAUNCHXL-CC2640R2.

    but it seems that LAUNCHXL-CC2640R2 has external 32KHz crystal on it.

    Do we need to damage launchpad(remove external 32khz crystal) for experimental?

    1.2 

    We search forum and find some code to verify internal 32kHz clock frequency as below.

    IOCPortConfigureSet(IOID_8, IOC_PORT_AON_CLK32K, IOC_STD_OUTPUT);
    AONIOC32kHzOutputEnable();

    and we measure DIO8 is 32.74~32.78KHz at our board.

    can this prove our config of codebase is right?

    2. Do we need to adjust argument in function HCI_EXT_SetSCACmd(500) every board at EMS. if yes, how to decide this argument?

     

    thank you.

  • Hi,
    1. Instead of following the step-by-step description in the application note you can simply select the RCOSC build configuration in CCS. This will set up everything for you.

    1.1 There is no need to remove the crystal from the LaunchPad if the 32 kHz RC oscillator is correctly configured as RTC source. One way to confirm that it is actually using the RC oscillator is to use an oscilloscope and verify that the crystal oscillator is off.

    1.2 It looks like you are not measuring accurately enough. Try using a frequency counter.

    2. No. This should be set to 500 for all boards if RC oscillator is used.

    Regards,
    Fredrik
  • Hi Fredrik and sean

    1.2 It looks like you are not measuring accurately enough. Try using a frequency counter. 

    -->  As I mentioned before, we have two boards and flashing the same image(USE RCOSC), one(A board) with 23kHz crystal can establish the connection successfully. The other(B board) fail.

          AND flash the same image to LAUNCHXL-CC2640R2, it still can establish the connection.

          So, we do an experimental, removing 32k crystal from A board, it cannot  establish the connection.... 

          We measure A board(without 32khz crystal),  the clock difference is about 56ppm.

          Is it related to hardware issue? or any SW configuration we can try?

          thank you all.

  • Hi

    we use simple peripheral with config "FlashROM_StackLibrary_RCOSC", the PCB without 32khz crystal can establish connection!!!

    so, we review all step we do on Using 32-kHz Crystal-Less Mode

    the step 2, ccfg_app_ble.c belong to bim project on simple_peripheral_oad_offchip, not app project.

    we miss this step, so we copy ccfg_app_ble_rcosc.c to bim, remove ccfg_app_ble.c from bim and add add USE_RCOSC to Defined symbols.

    rebuilding all project and flashing image to test PCB, hope it works fine, but we suffer another problem,  app stop at [ROCODE$$Limit + 0xfff4419]

    we search the forum and find some post talk about this issue as below:

    https://e2e.ti.com/support/wireless-connectivity/bluetooth/f/538/t/743865?CC2640R2F-ROCODE-Limit-displayed-on-the-call-stack 

    https://e2e.ti.com/support/tools/ccs/f/81/t/758546 

    it looks like stack or heap issue.

    But, we observe stack usage that does not overflow.  do we need to check any configuration?

    thank you.

  • Hi,

    The thread you have linked from Tim C explains why the call stack is non-sensical. It is because 0x1000044A corresponds with the TI-RTOS in ROM kernel and the symbols are not loaded for the RTOS ROM.

    By the way, 0x1000044A corresponds with the WFI instruction if I am not mistaken ( you can check by following the guide to load symbols here: ) so the device has not crashed, but instead seems to be in a pend loop.

    Can you enable heapmgr metrics and be sure that the stack is out out of memory (i.e. heapmgrMemfail == 0). More information on heap debugging is also in the debug guide I have linked above: 

    dev.ti.com/.../

  • Hi

    Finally, we have some finding that there are two difference define between ccfg_app_ble_rcosc.c and ccfg.c

    #ifndef SET_CCFG_MODE_CONF_VDDR_TRIM_SLEEP_TC
    //#define SET_CCFG_MODE_CONF_VDDR_TRIM_SLEEP_TC           0x1        // Temperature compensation on VDDR sleep trim disabled (default)
     #define SET_CCFG_MODE_CONF_VDDR_TRIM_SLEEP_TC        0x0        // Temperature compensation on VDDR sleep trim enabled
    #endif
    
    //#####################################
    // Clock settings
    //#####################################
    
    #ifndef SET_CCFG_MODE_CONF_SCLK_LF_OPTION
    // #define SET_CCFG_MODE_CONF_SCLK_LF_OPTION          0x0        // LF clock derived from High Frequency XOSC
    // #define SET_CCFG_MODE_CONF_SCLK_LF_OPTION          0x1        // External LF clock
    //#define SET_CCFG_MODE_CONF_SCLK_LF_OPTION           0x2        // LF XOSC
     #define SET_CCFG_MODE_CONF_SCLK_LF_OPTION            0x3        // LF RCOSC
    #endif

    we just append these to ccfg_app_ble.c of bim project. it's work.

    thank you.

  • Hi team,

    Our document (dev.ti.com/.../custom-hardware.html might mislead customer. For for offchip_OAD project, ccfg_app_ble_rcosc.c cannot replace ccfg_app_ble.c directly.
    1. Include rcosc_calibration.c, rcosc_calibration.h and ccfg_app_ble_rcosc.c files which locate at<SDK_INSTALL_DIR>\source\ti\blestack\common\cc26xx\rcosc
    2. Exclude ccfg_app_ble.c from build.

    For ccfg_app_ble.c in bim_oad_offchip_cc2640r2lp_app, there is additional define as below.
    #ifdef __TI_COMPILER_VERSION__
    //BIM OAD Offchip reset vector is located in pg 30, ROM code should jump there.
    #define SET_CCFG_IMAGE_VALID_CONF_IMAGE_VALID 0x1E000
    #elif defined(__IAR_SYSTEMS_ICC__)
    //BIM OAD Offchip reset vector is located in pg 31, ROM code should jump there.
    #define SET_CCFG_IMAGE_VALID_CONF_IMAGE_VALID 0x1F000
    #endif
  • Hi Jerry,

    Thanks for following up.
    We will add a note to the RCOSC section. As well as a link to the OAD chapter of the guide where this is covered in depth.