CC2642R: NPI implementation with Low Power Mode

Takayuki Miyazaki

Part Number: CC2642R

Hi team,

Our customer plans to develop the next generation system with CC2642R and customer investigating Low Power mode control. They are using Network Processor Interface (NPI).

According to CC13x2/CC26x2 SDK BLE5-Stack User’s Guide( http://dev.ti.com/tirex/explore/content/simplelink_cc13x2_26x2_sdk_3_10_00_53/docs/ble5stack/ble_user_guide/html/ble-stack-common/npi-index.html ), there is following description, as you know

In order to properly manage the power domains of the device, there must be a way for an external host to wake the network processor from low power modes. This is done through the inclusion of the following pins (MRFY[CTS] /SRDY[RTS]).

Since customer would like to know more detail information for this, customer is also reading TRM (5.7.1 cc26_aon_event_AON_EVENT_RMAP Registers, 7.6 Power Modes, 13.10.3 cc26_mcu_ioc_map1 Registers) . however, customer is not able to find helpful descriptions about MRFY[CTS] /SRDY[RTS].

Customer would like to implement Low Power mode, should they use MRFY[CTS] /SRDY[RTS] ?
Regarding to current system, customer does not assign CTS/RTS for UART I/F. this means, there is possibility that CC26x2 is not able to enter Low Power Mode. Is that correct?

I believe External Host is able to wake CC26x2 from low power mode by GPIO. In this case, what user’s guide should customer refer to? Could you evaporate it, please?

Best regards,

Miyazaki

over 5 years ago

0 Elin W over 5 years ago

TI__Genius 14845 points

Hi Takayuki,

Assigning an expert to comment.

Thanks,
Elin

0 Marie H over 5 years ago

TI__Guru* 83691 points

Hi Takaykui,

1. They should use MRDY as described in the guide you linked.

2. I don't think this will affect the device going into standby/sleep or noe.

0 NAKAGIRI Masato over 5 years ago in reply to Marie H

Prodigy 130 points

Hello all,

I am an engineer on this topic.
I want to confirm.

In our system, MRDY[CTS] / SRDY[RTS] is open (NC).
I think it does not affect the control (enter / wake) of low power mode.
Is my idea correct?

If open(NC) is not possible, please tell me the pin processing (PullUp or PullDown).

Thanks,
N.M.

0 Marie H over 5 years ago in reply to NAKAGIRI Masato

TI__Guru* 83691 points

Hi,

According to guide the MRDY and SRDY pins should be configured in the following way:

Master Ready (MRDY): A GPIO pin whose logic level indicates the state of the master processor. MRDY is an active low (low true) signal. An MRDY event indicates that the master processor is ready to send or receive data.
Slave Ready (SRDY): A GPIO pin whose logic level indicates the state of the slave processor. SRDY is an active low (low true) signal. An SRDY event indicates that the slave processor is ready to send or receive data.

Thus both the MRDY and SRDY pins should be set to Pull Down. (NC is not possible.)

0 NAKAGIRI Masato over 5 years ago in reply to Marie H

Prodigy 130 points

Hi Marie san,

I'm sorry, I made a mistake in the description of the settings.
In our system, we do not assign MRDY/SRDY to any DIO.

I think it does not affect the control (enter / wake) of low power mode.
Is my idea correct?

Thanks,

N.M.

0 Marie H over 5 years ago in reply to NAKAGIRI Masato

TI__Guru* 83691 points

Hi,

NPI can't work without MRDY and SRDY pins, so you need to assign them to a GPIO. When NPI is active these GPIOs should be set to Pull Down.

0 NAKAGIRI Masato over 5 years ago in reply to Marie H

Prodigy 130 points

Hi Marie san,

Thank you very much for your advice. We'll check it.

Thanks,
N.M.

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CC2642R: NPI implementation with Low Power Mode