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TRF7970A: Supply voltage for VDD_I/O on TRF7970A

Nomo
Guru 16800 points

Part Number: TRF7970A

Hello,

I have a question for the supply voltage for VDD_I/O on TRF7970A.
VDD_X and VDD_I/O are shorted in the schematic of datasheet.
However, in case these ports are shorted and TRF7970A is in 5V operation, the processor cannot connect the port of TRF7970A because of voltage restriction on my customer's board.
Can VDD_I/O be supplied from external LDO.
My customer wants to separate VDD_X and VDD_I/O.

Best Regards,

Nomo

  • 0
    TI__Guru*** 135355 points
    Hello Nomo-san,

    VDD_I/O can be supplied to external LDO. The important part is to make sure VDD_I/O is supplied with the voltage the MCU expects on the SPI lines.

    When separating VDD_X and VDD_I/O, it is very important to understand that VDD_X is an internal regulator for the TRF7970A and absolutely must retain the 2.2uF and .01uF filter caps on it, otherwise the regulator will not function correctly and can cause serious performance issues with the device. So please communicate to the customer they need these caps on VDD_X still - even if it's not being connected to anything.
  • 0 in reply to Ralph Jacobi
    Guru 16800 points

    Hello Ralph-san,

    Thank you for your kind support.
    I have an additional question for VDD_I/O.
    Are there any constraints for power up/down sequence in case VDD_I/O is connected to external LDO?
    My customer wants to know the sequence and the timing.

    Best Regards,

    Nomo

  • 0 in reply to Nomo
    TI__Guru* 91336 points
    Nomo-san -
    for the answer about the VDD_I/O please see section 3.5 (page 7) here ==> www.ti.com/.../sloa205a.pdf
    figure 6 in that document is also important if you know that power supply will not be constant.

    the important timing diagram to know about and respect with the device is shown on page 21 here ==> www.ti.com/.../trf7970a.pdf (so the rise time shown in the first document is clear to you also)
  • 0 in reply to Josh Wyatt
    Guru 16800 points

    Hello Josh-san,

    Thank you for your reply.
    Almost I can understand the power sequence; however, I cannot understand sequence of VDD_I/O and VIN.
    Which power should be supplied first and how long time should be delayed powering up between VDD_I/O and VIN?

    Best Regards,

    Nomo

  • 0 in reply to Nomo
    TI__Guru*** 135355 points
    Hello Nomo-san,

    We don't have any specification for this. As long as VDD_IO is established before SPI communication, it should be fine. I don't believe we have characterized how long VDD_IO needs to be applied before the first SPI signal is sent, but it shouldn't be long so if the voltage is applied at the same time the MCU is going through startup, by the time all configurations are done and the first SPI packet is ready to be sent the TRF7970A should be ready to receive it.