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LAUNCHXL-CC1350-4: CC1350 uart FIFO

Part Number: LAUNCHXL-CC1350-4
Other Parts Discussed in Thread: CC1350

Hi all,

I am working with the UART CC1350 chip, and try to using the FIFO  TX and Rx.

I searched on the document technical user guide and found the UART FIFO at section  19.1, 19.2, and 19.4.5 on this document.

But I cannot figure at 19.1 and 19.2 how many byte for FIFO  toltal ? what 's mean 32x8  and 32x12, because I can't see the basic unit.

I found on section 19.4.5 with 1/4 FIFO is 4 byte, then the toltal FIFO is 16 byte, is it true?

In the CCS Studio, I cannot find any examples that guide to use the uart FIFO or any config for the uart FIFO.

Pls help me to solve my problems.

  • Hi Huy Pham,

    First I'd like to ask the following. Which version of the Simplelink SDK are you using?

    Having said this, the recommended way of using the UART is with the UART driver from TI-DRIVERS.

    TI-Drivers are designed to be thread safe and work seamlessly inside of a real time operating system (RTOS) application. Furthermore, all TI-Driver implementations utilize the Power driver APIs to ensure low power consumption at all times.

    Here you can find complementary information on how to use the UART. Just select UART.h from the table.


  • Thanks AndresM for your reply.

    I'm using the latest CC13xx SDK from TI (V4.10), using the UART API function from the SDK to create another app.

    But, let's focus on my question, I want to know how CC1350 works with hardware UART FIFO using SDK.

    I found on TI E2E some threads about using CC13xx FIFO, same as my question, but no one knows the exact amount of FIFO memory follow the technical datasheet.

  • Hi Huy Pham.

    For your first question:

    The TRM states that you have two FIFOs, one for Tx and another for Rx.The Rx FIFO is 32 x 12, which basically means that the FIFO has 32 slots, and each slot has a size of 12 bits. Why 12 bits? That is because the Rx FIFO has an extra 4 bits per character (slot) to accommodate status information.

    The Tx FIFO on the other hand is only 32 x 8. Because in this case it does not have those extra bits for status information.

    Having said this, there does seem to be an inconsistency in the last paragraph of Section 19.4.5. This seems to be an error in the TRM.

    For your second question:

    The examples in the SDK rely on the use of TI-DRIVERS. In this particular case the UART driver. You won’t find any examples dealing specifically with the FIFOs, because a default value is used.

    You can see the default values being used by importing an example project into CCS (e.g. uart echo) and then opening the CC13*0_LAUNCHXL.c file. You can then find a section of code related to the UART, where you will see this:

    const UARTCC26XX_HWAttrsV2 uartCC26XXHWAttrs[CC1310_LAUNCHXL_UARTCOUNT] = {
            .baseAddr       = UART0_BASE,
            .powerMngrId    = PowerCC26XX_PERIPH_UART0,
            .intNum         = INT_UART0_COMB,
            .intPriority    = ~0,
            .swiPriority    = 0,
            .txPin          = CC1310_LAUNCHXL_UART_TX,
            .rxPin          = CC1310_LAUNCHXL_UART_RX,
            .ctsPin         = PIN_UNASSIGNED,
            .rtsPin         = PIN_UNASSIGNED,
            .ringBufPtr     = uartCC26XXRingBuffer[CC1310_LAUNCHXL_UART0],
            .ringBufSize    = sizeof(uartCC26XXRingBuffer[CC1310_LAUNCHXL_UART0]),
            .txIntFifoThr   = UARTCC26XX_FIFO_THRESHOLD_1_8,
            .rxIntFifoThr   = UARTCC26XX_FIFO_THRESHOLD_4_8,
            .errorFxn       = NULL

    There you can see txIntFifoThr and rxIntFifoThr attributes which are used to configure the FIFO level at which interrupts are generated.


  • Thanks AndresM