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CC1352R: GPIO Interrupt triggering on wrong edge

Part Number: CC1352R

Hi all,

I'm doing a basic app to detect rising edges of a signal using GPIO.h driver from TI Drivers and TIRTOS. When tested with a internal clock as a source signal it works fine. However when I connect it to the desired external signal that I want to analyze, sometimes the interrupt is triggered on a falling edge as well.

Here's the code:

void gpioDataInFxn(void)
{
    GPIO_write(CONFIG_GPIO_LED,1);
    GPIO_write(CONFIG_GPIO_LED,0);
}

void *mainThread(void *arg0)
{
    /* Call driver init functions */
    GPIO_init();

    /* Configure output pins */
    GPIO_setConfig(CONFIG_GPIO_LED, GPIO_CFG_OUT_STD | GPIO_CFG_OUT_LOW);

    /* Configure input pins */
    GPIO_setConfig(CONFIG_GPIO_DATA_IN, GPIO_CFG_IN_PD | GPIO_CFG_IN_INT_RISING);

    /* Install Data In callback */
    GPIO_setCallback(CONFIG_GPIO_DATA_IN, gpioDataInFxn);

    /* Enable Data In interrupt */
    GPIO_enableInt(CONFIG_GPIO_DATA_IN);
    
    while(1) 
    { }
}

There are only 2 pins being used, one as input for the data signal and one as output for an LED. The input is configured to use interrupt for rising edge. The interrupt callback just quickly writes the LED to 1 and then back to 0 (it's not noticeable visually, but I'm using a logic analyzer to confirm). 

When connected to the external signal input, this is what I get on the logic analyzer:

Although most of the times the interrupt is triggered correctly on the rising edge, there is still activations on the falling edge. If I zoom in:

We can see the quick activation of the LED on both rising and falling edges. I have zoomed as much as possible into both edges of the data in signal, and I don't see any jitter on the transitions:

Why is it triggering on falling edges and how can I avoid it?

Thanks

  • Hi,

    To me, this sounds like an issue with the signal source. Are you able to make an analog measurement of the input signal (using an oscilloscope or similar) to make sure there is no jitter? Sometimes the logic analyzer can hide the jitter, noise etc. in the signal.

    You can also try to enable hysteresis mode (using GPIO_CFG_HYSTERESIS_ON).

    Regards,
    Nikolaj