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CC1312R: Problem changing Flash vector table address

D. Devedzhiev
Intellectual 705 points
Part Number: CC1312R
Other Parts Discussed in Thread: SYSCONFIG,

Hi,

I want to put some info (like TI OAD image hader), with size 0xA8 bytes, in front of my application code. In order to do this as a first step I just move Flash vector table to start of 0xA8 instead of 0x0 changing FLASH region in linker command file and Flash vector table start address in CCFG (using Sysconfig).

timerled_CC1312R1_CodeOffset_test.zipThe problem is that after my changes the prooject could run only on debuger after loading it to target (Run to main()). Not works without debuger and after "Board reset" with debuger (loops endlessly in UARTAutoBaud() ROM function).

I've recriated this with the "Timerled" example adding additional build configurations with "A8_CodeOffset" within its name.

timerled_CC1312R1_CodeOffset_test.zip

Could you tell me what I miss?

Regards,

Dimitar

  • +1
    Intellectual 705 points

    I found out what caused my problem.
    According to the CC1312R TRM the offset of the vector table must be aligned to 512-byte boundary (0xA8 is not).

    On system reset, the vector table is fixed at address 0x0000 0000. Privileged software can write to the
Vector Table Offset register (CPU_SCS:VTOR) to relocate the vector table start address to a different
memory location, in the range 0x0000 0200 to 0x3FFF FE00. When configuring the CPU_SCS:VTOR
register, the offset must be aligned on a 512-byte boundary.

    Changing 0xA8 to 0x200 solves the issue and now my software works again, but I have new questions:

    1. According to general ARM documentation for Cortex-M4 Vector Table Offset Register and my calculation for CC1312R the offset should work with addtres alingned to 256-byte boundary to. I've tested this and its looks like to work in my case, but as TI should know better what are constrains, the question is: Is there any reason CC1312R vector table offset address to have to be aligned to 512-byte boundary instead to 256-byte boundary?

    2. Could you point me to information about CC1312R booting procedure (chip ROM bootloader related), if there is such?   

    Regards,

    Dimitar

  • +1 in reply to D. Devedzhiev
    TI__Mastermind 20332 points

    Hi Dimitar,

    It seems you are right, a 256byte boundary should be sufficient. Thanks for also testing it out. 

    Some documentation is found in the Bootloader section of the Technical Reference Manual. 

    https://dev.ti.com/tirex/explore/node?node=A__AO0VNcTkm37Mb0AVH5vFDQ__cc13x0_devices__coGQ502__LATEST

    And some content is available on in this app note when the serial bootloader is used. 

    https://www.ti.com/lit/an/swra466d/swra466d.pdf

    Regards,

    Sid