LP-EM-CC1354P10: Configuring RF Core Data Signals for PA and LNA

Tool/software:

Hi All,

I am not getting proper output from RFC_GPO pins while running it in sub1ghz mode.

Mux Code (called before bios start)–

• GPIO_setConfigAndMux(GPIO_DIO43_CONST,GPIO_CFG_OUT_STD | GPIO_CFG_OUT_HIGH, IOC_PORT_RFC_GPO0);
• GPIO_setConfigAndMux(GPIO_DIO42_CONST,GPIO_CFG_OUT_STD | GPIO_CFG_OUT_HIGH, IOC_PORT_RFC_GPO3);
• GPIO_setConfigAndMux(GPIO_DIO44_CONST, GPIO_CFG_OUT_STD | GPIO_CFG_OUT_HIGH, IOC_PORT_RFC_GPO1);
• GPIO_setConfigAndMux(GPIO_DIO41_CONST, GPIO_CFG_OUT_STD | GPIO_CFG_OUT_HIGH, IOC_PORT_RFC_GPO2);

Radio settings - 

• 38.4K Bits/Sec - 902 to 928 MHz : 50 channels
• GFSK modulation.  Frequency deviation = 19.043 KHz
• Preamble of 16 byte and sync word of 2 bytes
• Radio is always RX ON & changes channel every 2.7 Milliseconds

Below is the logic analyzer output, were the radio is switching channel every 2.7 msecs with continuous RX ON. 

observations - 

1. TX line toggling without any transmission
2. LNA line toggling between frequency changes
3. PA line going down after Synthesizer calibration

Can someone explain the behavior and how to correct it ?