Tool/software:
I'm trying to understand the details around a statement about the FLASH memory being provided in "two banks" one of my customers highlighted to me in the datasheet. There is virtually zero further information about this in both the datasheet and TRM. More specifically:
- Where is the division point between banks? Are they equal size 512K banks, or asymmetric?
- Can program execution and data fetches out of one FLASH bank continue without any stall while the other FLASH bank is being erased or programmed?
- Can the bank addresses be flipped, which can be useful in some firmware update schemes?
- Do we have any additional documentation on the two bank feature? I've not been able to find any.
Thanks,
Stuart