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Hi,
I want to use the radio state machine option that makes the radio stay in TX after sending a packet during a packet burst.
However when I enable this option none of the packets are sent. (After arming the dma I poll on the TX done interrupt but it never occurs)...
I thought this has to do with the fact tha in my regular version I give a strobe TX cmd. Removing this didn't help.
Any idea anyone? The data sheet almost says nothing about this option?
I have written the following code and it works fine. The code simly takes 3 packets of fixed length (10 bytes) located in
txBuffer, txBuffer1, and txBuffer2 and transmit them using TXOFF_MODE = stay in TX and the DMA set for repeated single mode.
The receiver (using RXOFF_MODE = RX) stores the packets in rxBuffer, rxbuffer1, and rxBuffer2.
Here is my code
void main(void) {
CLKCON &= ~OSC_BIT;
while (CLKCON & OSC_BIT);
SLEEP |= OSC_PD_BIT;
halBuiInitLcd();
FSCTRL1 = 0x06; // Frequency synthesizer control.
FSCTRL0 = 0x00; // Frequency synthesizer control.
FREQ2 = 0x10; // Frequency control word, high byte.
FREQ1 = 0xA7; // Frequency control word, middle byte.
FREQ0 = 0x62; // Frequency control word, low byte.
MDMCFG4 = 0xF5; // Modem configuration.
MDMCFG3 = 0x83; // Modem configuration.
MDMCFG2 = 0x13; // Modem configuration.
MDMCFG1 = 0x22; // Modem configuration.
MDMCFG0 = 0xF8; // Modem configuration.
CHANNR = 0x00; // Channel number.
DEVIATN = 0x15; // Modem deviation setting (when FSK modulation is enabled).
FREND1 = 0x56; // Front end RX configuration.
FREND0 = 0x10; // Front end RX configuration.
MCSM0 = 0x18; // Main Radio Control State Machine configuration.
FOCCFG = 0x16; // Frequency Offset Compensation Configuration.
BSCFG = 0x6C; // Bit synchronization Configuration.
AGCCTRL2 = 0x03; // AGC control.
AGCCTRL1 = 0x40; // AGC control.
AGCCTRL0 = 0x91; // AGC control.
FSCAL3 = 0xE9; // Frequency synthesizer calibration.
FSCAL2 = 0x0A; // Frequency synthesizer calibration.
FSCAL1 = 0x00; // Frequency synthesizer calibration.
FSCAL0 = 0x1F; // Frequency synthesizer calibration.
TEST2 = 0x81; // Various test settings.
TEST1 = 0x35; // Various test settings.
TEST0 = 0x09; // Various test settings.
PA_TABLE0 = 0x60; // PA output power setting.
PKTCTRL1 = 0x04; // Packet automation control.
PKTCTRL0 = 0x04; // Packet automation control.
ADDR = 0x00; // Device address.
PKTLEN = N; // Max length accepted by the radio.
MCSM1 = 0x3E;
P1DIR |= 0x01; // P1_0 is an output (Green LED)
// Select from LCD menu either transmitter or receiver mode
mode = selectMode();
if (mode == RADIO_MODE_TX)
{
SET_WORD(dmaConfig.SRCADDRH, dmaConfig.SRCADDRL, txBuffer);
SET_WORD(dmaConfig.DESTADDRH, dmaConfig.DESTADDRL, &X_RFD);
dmaConfig.VLEN = DMA_VLEN_USE_LEN; // VLEN = 000
SET_WORD(dmaConfig.LENH, dmaConfig.LENL, N); // See page 103 of the data sheet + DN107
dmaConfig.WORDSIZE = DMA_WORDSIZE_BYTE;
dmaConfig.TRIG = DMA_TRIG_RADIO;
dmaConfig.TMODE = DMA_TMODE_REPEATED_SINGLE;
dmaConfig.SRCINC = DMA_SRCINC_1;
dmaConfig.DESTINC = DMA_DESTINC_0;
dmaConfig.IRQMASK = DMA_IRQMASK_DISABLE;
dmaConfig.M8 = DMA_M8_USE_8_BITS;
dmaConfig.PRIORITY = DMA_PRI_HIGH;
// Save pointer to the DMA configuration struct into DMA-channel 0
// configuration registers
SET_WORD(DMA0CFGH, DMA0CFGL, &dmaConfig);
}
else
{
SET_WORD(dmaConfig.SRCADDRH, dmaConfig.SRCADDRL, &X_RFD);
SET_WORD(dmaConfig.DESTADDRH, dmaConfig.DESTADDRL, rxBuffer);
dmaConfig.VLEN = DMA_VLEN_USE_LEN; // VLEN = 000
SET_WORD(dmaConfig.LENH, dmaConfig.LENL, N + 2); // See page 103 of the data sheet + DN107
dmaConfig.WORDSIZE = DMA_WORDSIZE_BYTE;
dmaConfig.TRIG = DMA_TRIG_RADIO;
dmaConfig.TMODE = DMA_TMODE_SINGLE;
dmaConfig.SRCINC = DMA_SRCINC_0;
dmaConfig.DESTINC = DMA_DESTINC_1;
dmaConfig.IRQMASK = DMA_IRQMASK_ENABLE;
dmaConfig.M8 = DMA_M8_USE_8_BITS;
dmaConfig.PRIORITY = DMA_PRI_HIGH;
// Save pointer to the DMA configuration struct into DMA-channel 0
// configuration registers
SET_WORD(DMA0CFGH, DMA0CFGL, &dmaConfig);
}
// 1. Clear interrupt flags
// For pulsed or edge shaped interrupt sources one should clear the CPU
// interrupt flag prior to clearing the module interrupt flag
S1CON &= ~RFIF_1_0;
DMAIF = 0;
RFIF &= ~IRQ_DONE;
DMAIRQ &= ~DMAIF_0;
// 2. Set individual interrupt enable bit in the peripherals SFR, if any
RFIM = IM_DONE;
// No flag for the DMA (Set in the DMA struct (IRQMASK = 1))
// 3. Set the corresponding individual, interrupt enable bit in the IEN0,
// IEN1, or IEN2 registers to 1
HAL_INT_ENABLE(INUM_RF, INT_ON);
HAL_INT_ENABLE(INUM_DMA, INT_ON);
// 4. Enable global interrupt
INT_GLOBAL_ENABLE(INT_ON);
// Create packets to transmit
for (i = 0; i < N; i++)
txBuffer[i] = i;
for (i = 0; i < N; i++)
txBuffer1[i] = i + 10;
for (i = 0; i < N; i++)
txBuffer2[i] = i + 20;
switch (mode)
{
case RADIO_MODE_TX:
// Infinite loop
while (TRUE)
{
while (!halBuiButtonPushed());
// Send the packet
DMAARM = DMAARM_CHANNEL0; // Arm DMA channel 0
asm("NOP");
asm("NOP");
asm("NOP");
asm("NOP");
asm("NOP");
asm("NOP");
asm("NOP");
asm("NOP");
asm("NOP");
RFST = STROBE_TX; // Switch radio to TX (The TX strobe will generate the DMA radio trigger)
SET_WORD(dmaConfig.SRCADDRH, dmaConfig.SRCADDRL, txBuffer1);
while (!packetTransmitted); // Wait for packet to be transmitted
packetTransmitted = FALSE;
SET_WORD(dmaConfig.SRCADDRH, dmaConfig.SRCADDRL, txBuffer2);
while (!packetTransmitted); // Wait for packet to be transmitted
packetTransmitted = FALSE;
while (!packetTransmitted); // Wait for packet to be transmitted
packetTransmitted = FALSE;
RFST = STROBE_IDLE;
}
case RADIO_MODE_RX:
// Infinite loop
while (TRUE) {
DMAARM = DMAARM_CHANNEL0; // Arm DMA channel 0
RFST = STROBE_RX; // Switch radio to RX
while (!packetReceived);
packetReceived = FALSE;
SET_WORD(dmaConfig.DESTADDRH, dmaConfig.DESTADDRL, rxBuffer1);
DMAARM = DMAARM_CHANNEL0; // Arm DMA channel 0
while (!packetReceived);
packetReceived = FALSE;
SET_WORD(dmaConfig.DESTADDRH, dmaConfig.DESTADDRL, rxBuffer2);
DMAARM = DMAARM_CHANNEL0; // Arm DMA channel 0
while (!packetReceived);
packetReceived = FALSE;
}
}
}
#pragma vector=RF_VECTOR
__interrupt void rf_IRQ(void) {
S1CON &= ~RFIF_1_0; // Clear the CPU RFIF interrupt flag
RFIF &= ~IRQ_DONE; // Tx/Rx completed, clear the module interrupt flag
if (mode == RADIO_MODE_TX)
packetTransmitted = TRUE;
}
#pragma vector=DMA_VECTOR
__interrupt void dma_IRQ(void) {
DMAIF = 0; // Clear the CPU DMA interrupt flag
DMAIRQ &= ~DMAIF_0; // DMA channel 0 module interrupt flag
packetReceived = TRUE;
}
I guess it would not have been a problem to use repetetive mode for the RX DMA as well
