I have been using 5 dma channels in my RF applications. So, II wanna write to flash through CPU SFR access not DMA
I made a test simple code of 2bytes flash write with chapter 12.3.2.2 CPU Flash write reference in CC2510f8 datasheet as followed.
I aleady have set clolck speed, source and global interrupt enable in code.
1. FCTL busy check
2. FADDRH or L, FWT, FCTL write set
at this time, I tested FADDRH valuse as FADDRH = 0x0e, FADDRL = 0x00; to write at 0x1c00
3. inserting 1 byte data to FWDATA register twice.
4. SWBUSY check for FCTL's flash writing
but, I could not handle FCTL.WRITE bit in spite of forcibly setting to FCTL through S/W register access.
also, at 0x1c00 address, the 2bytes data at flash region don't updated.
I think it seems to need some prior work.
Is there some environment setting of interrupts and other register etc. before acessing flash writing ?
or, do i miss the flash write handling???
Can I see some example code for flash write through CPU SFR access?
Thank you so much if you present me some simple example about it.