Hello,
When CC1120 is configured for variable packet length mode, the CC1120 receiver reads packet length from the first byte after the sync word.
Is there a way to read the internal register holding this length?
In my driver I read received bytes from the RX FIFO when RX is in progress (i have to handle messages longer than 128 bytes);
I think it should be worth considering the case that something goes wrong and I loose the synchronization with the receiver state,
so it should be useful to me to know if the length of the message I have pulled out from FIFO is equal to the length supposed by the receiver.
CRC checking should be enough, but unfortunately the CRC check information is appended to the message, so if I loose synchronization
I loose also the position of the CRC check bit. And I don't think that reading CRC check state from a GPIO pin (configured with PKT_CRC_OK function)
works well for me, if I am pulling out bytes from the RX FIFO when RX is in progress, right?
Thank you
Nicola