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How to estimate flash size of CC1310 ?

Other Parts Discussed in Thread: CC1310

Hi Sir,

I use CC1310 launchpad and the other board with CC1310F32 for HW test. The FW code base on TI-RTOS example code and use IAR compiller .

The code is work well in CC1310 launchpad(F128) but I can't programming to CC1310F32.

I check the code size about ~31K in MAP file and show as below.

23 027 bytes of readonly code memory
8 537 bytes of readonly data memory
18 155 bytes of readwrite data memory


Modify setting for CC1310F32

The code size 23027 + 8537 = 31564 . It seems to be fine to programming to CC1310F32.
I modify the Target device to CC1310F32 in IAR Options setting and I change the Flash define setting in CC1310DK_7XD.icf.
Modify the link file for 32K flash size as below , the compile error occurred.


//--------------------------
/*###ICF### Section handled by ICF editor, don't touch! ****/
/*-Editor annotation file-*/
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
/*-Specials-*/
define symbol __ICFEDIT_intvec_start__ = 0;
/*-Memory Regions-*/
define symbol __ICFEDIT_region_ROM_start__ = 0x00000000;
/*define symbol __ICFEDIT_region_ROM_end__ = 0x0001FFFF; */
/* for 32K flash setting*/
define symbol __ICFEDIT_region_ROM_end__ = 0x00007FFF;

define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
define symbol __ICFEDIT_region_RAM_end__ = 0x20004FFF;
/*-Sizes-*/
define symbol __ICFEDIT_size_cstack__ = 0x800;
define symbol __ICFEDIT_size_heap__ = 0x1000;
/**** End of ICF editor section. ###ICF###*/
//---------------------------------------

If i change the setting to 0x8BFF the compile will success, and the Hex file will over 0x7FFF. So I cannot programming into CC1310F32.
Did i miss something ? Why the compile file exceed MAP file over ~4K size ?

How to estimate real flash size of CC1310 if the Map file is not real?

BR,

Jack

  • It could be that the last page is reserved for CCFG, so no code can be loaded there. The Flash available for code is 32K - 4K (last page). That said though, if you are desperate you could use the parts of the last page which is not reserved for CCFG. You should be able to reduce the code size of your application to fit into the 32K device. For 'ease of use' all TIRTOS RF examples a built without optimization, so you could enable this to reduce code foot print, it is also likely that the TIRTOS config file can be used to build out some RTOS feature that are not required.

    Regards,
    Tony.
  • Hi Tony,

    How to know the size of CCFG, and how to use the parts of last page?

    I try to reduce the code size use the high level optimization, the code size down to ~29K . So i still cannot program to 32K device.

    BR,
    Jack

  • For the CC1310 I believe the CCFG starts at 0xF8A in the last flash page. So your changes to the linker file should be fine, and you code compiles to below the CCFG so that should be fine as well. Can you post the linker error you are getting?

    Regards, TC
  • Hi ,

    Provide the error massage as picture, and the Link file as attached file.

    After check the link file, it seems put CCFG to the end of Flash by command as below. How to modify the link file to use the last flash page.

    //--------------------------------------------------------
    // Place the CCA area at the end of flash
    //
    place at end of FLASH_region { readonly section .ccfg };
    keep { section .ccfg };

    //--------------------------------------------------------

    //*****************************************************************************
    //! @file       cc26x0f128.icf
    //! @brief      CC26x0F128 PG2 linker configuration file for IAR EWARM.
    //!
    //! Revised     $Date: 2014-09-03 17:58:47 +0200 (on, 03 sep 2014) $
    //! Revision    $Revision: 13661 $
    //
    //  Copyright (C) 2015 Texas Instruments Incorporated - http://www.ti.com/
    //
    //
    //  Redistribution and use in source and binary forms, with or without
    //  modification, are permitted provided that the following conditions
    //  are met:
    //
    //    Redistributions of source code must retain the above copyright
    //    notice, this list of conditions and the following disclaimer.
    //
    //    Redistributions in binary form must reproduce the above copyright
    //    notice, this list of conditions and the following disclaimer in the
    //    documentation and/or other materials provided with the distribution.
    //
    //    Neither the name of Texas Instruments Incorporated nor the names of
    //    its contributors may be used to endorse or promote products derived
    //    from this software without specific prior written permission.
    //
    //  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
    //  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
    //  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
    //  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
    //  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
    //  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
    //  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
    //  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
    //  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
    //  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
    //  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    //****************************************************************************/
    
    
    /*###ICF### Section handled by ICF editor, don't touch! ****/
    /*-Editor annotation file-*/
    /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
    /*-Specials-*/
    define symbol __ICFEDIT_intvec_start__ = 0;
    /*-Memory Regions-*/
    define symbol __ICFEDIT_region_ROM_start__ = 0x00000000;
    //set Flash end in here .... by jack
    define symbol __ICFEDIT_region_ROM_end__   = 0x00007FFF;
    define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
    define symbol __ICFEDIT_region_RAM_end__   = 0x20004FFF;
    /*-Sizes-*/
    define symbol __ICFEDIT_size_cstack__ = 0x800;
    define symbol __ICFEDIT_size_heap__   = 0x1000;
    /**** End of ICF editor section. ###ICF###*/
    
    //
    // Define a memory region that covers the entire 4 GB addressable space of the
    // processor.
    //
    define memory mem with size = 4G;
    
    //
    // Define a region for the on-chip flash.
    //
    define region FLASH_region   = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
    
    //
    // Define a region for the on-chip SRAM.
    //
    define region RAM_region     = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
    
    //
    // Place the interrupt vectors at the start of flash.
    //
    place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
    keep { section .intvec};
    
    //
    // Place the CCA area at the end of flash
    //
    place at end of FLASH_region { readonly section .ccfg };
    keep { section .ccfg };
    
    //
    // Place remaining 'read only' in Flash
    //
    place in FLASH_region { readonly };
    
    
    //
    // Place .vtable_ram in start of RAM
    //
    place at start of RAM_region { section .vtable_ram };
    
    //
    // Define CSTACK block to contain .stack section. This enables the IAR IDE
    // to properly show the stack content during debug. Place stack at end of
    // retention RAM, do not initialize (initializing the stack will destroy the
    // return address from the initialization code, causing the processor to branch
    // to zero and fault)
    //
    define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { section .stack };
    place at end of RAM_region { block CSTACK };
    do not initialize { section .stack, section .noinit};
    
    //
    // Export stack top symbol. Used by startup file.
    //
    define exported symbol STACK_TOP = __ICFEDIT_region_RAM_end__ + 1;
    
    //
    // Define a block for the heap.  The size should be set to something other
    // than zero if things in the C library that require the heap are used.
    //
    define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
    place in RAM_region { block HEAP };
    
    //
    // Place all read/write items into RAM.
    //
    place in RAM_region   { readwrite };
    initialize by copy { readwrite };
    
    //
    // The USE_TIRTOS_ROM symbol is defined internally in the build flow (using
    // --config_def USE_TIRTOS_ROM=1) for TI-RTOS applications whose app.cfg file
    // specifies to use the ROM.
    //
    if (isdefinedsymbol(USE_TIRTOS_ROM)) {
        include "TIRTOS_ROM.icf";
    }
    

  • Jack,
    Sorry for the delay I hve been travelling. I can not see anything wrong the linker, can you attach the map file so I can see what symbols it is struggling to place? Also can you remove the Exe, Obj and list dir as well as any of the generated src files. Then do a build clean.

    Tony.
  • You may also find this thread useful.
    e2e.ti.com/.../1989334