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pcb design for cc1310

Simone Trinchero
Prodigy 155 points
Other Parts Discussed in Thread: CC1310

Goodmorning,

I'm developing a board involving the cc1310 7x7 4 layer.

I would know some information:

1)Are there any other (more recent) design files in addition to "SimpleLink CC1310 4-Layer 7x7 Differential 779-930 MHz v1.0.1 Design Files"?

2)Are there any design files whit Balun integrated in the RF path.

3)The files that you provide (SimpleLink CC1310 4-Layer 7x7 Differential 779-930) have to be opened with Cadence Allegro suite, but I need Altium Design files. I know that is possible to import them, but to do that it is necessary to have both software installed (so expensive).

4) Are there some detailed pdf files or similar with precise hardware and PCB design guidelines to include the CC1310 in a personal board project?

Thank you very much for the attention and the help.

Best regards

ST

  • 0
    TI__Genius 9705 points

    Hello Simone,

    1. There are several reference designs published for different packages and frequency bands in the CC1310 product page under technical documents -> Design files

    2. In the above link, there is a reference design for integrated passive component (balun+matching as well. There is an app note associated with design as well. 

    3. We are not able to provide PCB design files in any format other than cadence allegro. The CAD symbol for CC13xx is provided in a vendor neutral format and can be exported into Altium symbol. You can also look at some the TI designs that may have design files in Altium as a starting point. 

    4. It is recommended to follow reference design closely. There are PCB guidelines on the CC26xx BLE wiki page under design resources that apply to CC13xx as well. 

    Regards,

  • 0 in reply to SVS
    Prodigy 155 points

    Hi

    Thank you for your previous reply.

    I have one more problem:

    If I reproduce your layout on with the balun (SimpleLink CC1310 IPC 4-Layer 4x4 Differential 779-930 MHz v1.0.1 Design Files) provided only for the cc1310 4x4 with the cc1310 7x7 it is correct?

    I mean, I use all the provided design for the cc1310 7x7 (SimpleLink CC1310 4-Layer 7x7 Differential 779-930 MHz v1.0.1 Design Files) but at the pins RF_P, RF_N, RX_TX I use the design of the IPC 4x4, putting the IPC Filter 0850BM14E0016 instead of the capacitor/inductance path used in the previous design.

    This is a correct approach? The Johanson 0850BM14E0016 Impedance Matched Balun it is suitable for all cc1310 ?

    Thank you very much for your time and help.

    Best regards

    ST

  • 0 in reply to Simone Trinchero
    TI__Guru**** 317180 points
    You can use the IPCs for all 3 (4x4, 5x5 and 7x7) CC13xx packet sizes.
  • 0 in reply to SVS
    Prodigy 155 points

    Hi,

    can we modify the pcb layer stack (design cross section chart) provided in the pdf "CC13xxEM-7XD-7793_4L_layout_1_0" according to our pcb manufacture company eurocircuits (http://www.eurocircuits.com/) rules? More in details on TI design we find:

    * SURFACE - AIR 0 MM
    L1: TOP CONDUCTOR - COPPER 0.035 MM
    * DIELECTRIC - FR-4 0.175 MM
    L2: L2 PLANE - COPPER 0.018 MM
    * DIELECTRIC - FR-4 1.14 MM
    L3: L3 PLANE - COPPER 0.018 MM
    * DIELECTRIC - FR-4 0.175 MM
    L4: BOTTOM CONDUCTOR - COPPER 0.035 MM
    * SURFACE - AIR 0 MM


    instead eurocircuits can only provide this values:

    * SURFACE - AIR 0 MM
    L1: TOP CONDUCTOR - COPPER 0.018 MM
    * DIELECTRIC - FR-4 0.36 MM
    L2: L2 PLANE - COPPER 0.035 MM
    * DIELECTRIC - FR-4 0.71 MM
    L3: L3 PLANE - COPPER 0.035 MM
    * DIELECTRIC - FR-4 0.36 MM
    L4: BOTTOM CONDUCTOR - COPPER 0.018 MM
    * SURFACE - AIR 0 MM

    The big main different is the central core dielectric.

    Can you suggest us any problems arising from the usage eurocircuits values?

    More in detail, I need to know how I can calculate the new distance between the 50 ohm rf path and the ground plane around it.

    Thank you very much

    ST

  • 0 in reply to Simone Trinchero
    TI__Guru**** 317180 points
    In out reference designs the most important parameter after the type of substrate is the distance between L1 and L2. By increasing the distance the parasitics caps become smaller but the inductance in the vias to ground will be larger. This will change the impedance the RF_P/N sees and will therefore change the performance. That said, I did a quick simulation and the impedance change going from 175 um to 360 um is relatively small. I didn't take into account the reduced copper thickness,

    Overall I expect you to get close to the same number as in the datasheet with this stackup but it could be required to adjust some of the component values in the BOM to compensate for the changed stackup.