CC1310: CC1310 8 BIT CRC Support

Current Override setting is as per below,

uint32_t pOverrides[] =
{
/* override_synth.xml */
ADI_HALFREG_OVERRIDE (0, 61, 0xF, 0xD),
HW32_ARRAY_OVERRIDE (0x4038, 1),
(uint32_t) 0x0000003A,
HW_REG_OVERRIDE (0x4020, 0x7F00),
HW_REG_OVERRIDE (0x4064, 0x0040),
(uint32_t) 0x684A3,
(uint32_t) 0xC0040141,
(uint32_t) 0x0533B107,
(uint32_t) 0xA480583,
(uint32_t) 0x7AB80603,
ADI_REG_OVERRIDE (1, 4, 0x1F),
ADI_REG_OVERRIDE (1, 6, 0x45),
(uint32_t) 0xFFFFFFFF,
ADI_REG_OVERRIDE (0, 12, 0xF8),
};

Now as per 8 BIT CRC with Poly = 0x07

uint32_t pOverrides[] =
{
/* override_synth.xml */
ADI_HALFREG_OVERRIDE (0, 61, 0xF, 0xD),
HW32_ARRAY_OVERRIDE (0x4038, 1),
(uint32_t) 0x0000003A,
HW32_ARRAY_OVERRIDE (0x2004, 1),
(uint32_t) 0x07000000,
(uint32_t) 0x00088113,
HW_REG_OVERRIDE (0x4020, 0x7F00),
HW_REG_OVERRIDE (0x4064, 0x0040),
(uint32_t) 0x684A3,
(uint32_t) 0xC0040141,
(uint32_t) 0x0533B107,
(uint32_t) 0xA480583,
(uint32_t) 0x7AB80603,
ADI_REG_OVERRIDE (1, 4, 0x1F),
ADI_REG_OVERRIDE (1, 6, 0x45),
(uint32_t) 0xFFFFFFFF,
ADI_REG_OVERRIDE (0, 12, 0xF8),
};

Please confirm that above Override setting will work or not, if wrong please correct me.

Thanks & Regards
Piyush

You have at least one error, (uint32_t) 0xFFFFFFFF should always be the last entry in the override table.

For the others, it looks correct. It's fairly easy to test if you on the tx generate the correct CRC by using SmartRF Studio on the RX side and use fixed packet length set longer than the payload so the CRC becomes the last byte received. Compare with a unit you know send the correct CRC.

Thanks TER,

Its start working by changing the overrides.

Regards
Piyush