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CC1352P: CC1352P resetting with CLK_LOSS when no antenna is present resulting in inability to JTAG program

Part Number: CC1352P

Greetings,

I'm working with a custom CC1352P board which we program via JTAG and OpenOCD. I've found that our board which has no on-board antenna will reset with a reset cause of CLK_LOSS when a packet is transmitted with no antenna load. I've found that this hampers the ability to JTAG program the device - if for example I have something like the rfPacketTx example app running the board resets so quickly that I can't JTAG program it.

Two questions:

1. is there any way to avoid the resetting while transmitting with no antenna in our hardware design (other than the obvious of having an on-board antenna)

2. how can I JTAG program a device that is continually resetting itself?

Regards,

Tim

  • If you continuously get reset when you try to program the device it sounds like you have a hardware issue.

    Does that mean that you manage to program the device if you have terminated the antenna with 50 ohm? 

    Which RF output do you use when this is an issue, is it sub 1 GHz , 14 dBm or something else? 

    I can take a quick look at the schematic/ layout to see if I see something that could explain what you are seeing. Send me a friend request if you don't want the files on a public forum. I need pdf for the schematic/ gerber for the layout. 

  • TER said:

    If you continuously get reset when you try to program the device it sounds like you have a hardware issue.

    Does that mean that you manage to program the device if you have terminated the antenna with 50 ohm? 

    Which RF output do you use when this is an issue, is it sub 1 GHz , 14 dBm or something else? 

    I can take a quick look at the schematic/ layout to see if I see something that could explain what you are seeing. Send me a friend request if you don't want the files on a public forum. I need pdf for the schematic/ gerber for the layout. 

    I continuously get reset 'because' of not having an antenna and thus no 50ohm termination. If I put an antenna on the board its fine. The code that was on there that showed the issue was using the high gain PA (20dBm) on the CC1352P. The schematic is exactly the same as the  LAUNCHXL-CC1352P1 except we drop the on-board antenna and the on-board XDS110 and replace it with a 10pin JTAG header where we use an FTDI based JTAG dongle and OpenOCD to program.

    I realize that having an antenna resolves the reset issue but am more worried about the fact that when in that situation I can't JTAG program the board. If CC1352P RESET_N is asserted JTAG doesn't work. Is there another way to keep code from executing via JTAG?

    Tim

  • Do you have the following override in the code you are running when you are trying to debug:

     / Set TXRX pin to 0 in RX/TX and high impedance in idle.

    HW_REG_OVERRIDE(0x60A8,0x0001),

  • TER said:

    Do you have the following override in the code you are running when you are trying to debug:

     / Set TXRX pin to 0 in RX/TX and high impedance in idle.

    HW_REG_OVERRIDE(0x60A8,0x0001),

    Yes, this is in my code.

  • This has something to do with the 48MHz RF XTAL not starting up and/or faulting. We use an Abracon ABM12W-48.0000MHZ-7-D1X (48MHz 7pf load capacitance 10ppm freq tolerance 20ppm freq stability) xtal with 7pf caps. If I remove the 7pf caps the hang and/or CLK_LOSS on TX seems to go away.

    The schematic of the CC1352P1_LAUNCHXL shows the load caps on the 48MHz crystal unloaded yet I clearly see them on the CC1352P1_LAUNCHXL's we have (latest rev silicon). What is their value on these boards?

    The CC1352P datasheet indicates there is an internal cap array for tuning the crystal. How can I adjust this and what is the default?

    Tim

  • Are you using external as well as internal load capacitors for your XTAL? If so, the load capacitance might be too big for the XTAL to be able to start. You can disable the internal load capacitance in the CCFG.

    Tim Harvey9 said:

    The schematic of the CC1352P1_LAUNCHXL shows the load caps on the 48MHz crystal unloaded yet I clearly see them on the CC1352P1_LAUNCHXL's we have (latest rev silicon). What is their value on these boards?

    We use 7.5 pF and the internal load cap array is disabled. 

    Tim Harvey9 said:

    The CC1352P datasheet indicates there is an internal cap array for tuning the crystal. How can I adjust this and what is the default?

    See chapter 6 here: http://www.ti.com/lit/pdf/swra640

    -Simon