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CC1310: is it serious that the rfEasyLinkTX_CC1310_nortos does not fit on the CC1310F32?

Ralph Deffke
Expert 2915 points
Part Number: CC1310

Hi there,

I am trying to figure out why the linker can't fit the code into that chip. Is that true or what have I to do to make it fit?

Thanks for any idea.

Ralph

  • 0
    TI__Genius 10610 points

    Hi Ralph,

    Have you tried using "Release" build configuration? This optimizes the compiled code more than "Debug" and should allow the application to fit.

    Regards,

    Daniel

  • 0 in reply to daniel_o
    Expert 2915 points

    Hi Daniel,

    just tried, and negativ, I as well would wonder that .const data are 'optimized' away.

    Also I can set the optimization level in Debug as well as in Release mode

    These are the mappings in Release mode with optimization --off


    MEMORY CONFIGURATION

             name            origin    length      used     unused   attr    fill
    ----------------------  --------  ---------  --------  --------  ----  --------
      FLASH                 00000000   00008000  00006b0c  000014f4  R  X
      SRAM                  20000000   00004000  00001f84  0000207c  RW X


    SEGMENT ALLOCATION MAP

    run origin  load origin   length   init length attrs members
    ----------  ----------- ---------- ----------- ----- -------
    00000000    00000000    000000c8   000000c8    r--
      00000000    00000000    000000c8   000000c8    r-- .intvecs
    00000000    00000000    00003095   00003095    r--
      00000000    00000000    00003095   00003095    r-- .const
    000000c8    000000c8    00006814   00006814    r-x
      000000c8    000000c8    00006814   00006814    r-x .text
    000068dc    000068dc    00000008   00000008    rw-
      000068dc    000068dc    00000008   00000008    rw- .args
    000068e8    000068e8    000001d0   000001d0    r--
      000068e8    000068e8    000001d0   000001d0    r-- .cinit
    00007fa8    00007fa8    00000058   00000058    r--
      00007fa8    00007fa8    00000058   00000058    r-- .ccfg
    20000000    20000000    000016c0   00000000    rw-
      20000000    20000000    0000080c   00000000    rw- .data
      20000810    20000810    00000800   00000000    rw- .sysmem
      20001010    20001010    000006b0   00000000    rw- .bss
    20001700    20001700    000000c8   00000000    rw-
      20001700    20001700    000000c8   00000000    rw- .vtable_ram
    20003800    20003800    00000800   00000000    rw-
      20003800    20003800    00000800   00000000    rw- .stack

    and here with full optimization for size:


    MEMORY CONFIGURATION

             name            origin    length      used     unused   attr    fill
    ----------------------  --------  ---------  --------  --------  ----  --------
      FLASH                 00000000   00008000  00005cba  00002346  R  X
      SRAM                  20000000   00004000  0000204d  00001fb3  RW X


    SEGMENT ALLOCATION MAP

    run origin  load origin   length   init length attrs members
    ----------  ----------- ---------- ----------- ----- -------
    00000000    00000000    000000c8   000000c8    r--
      00000000    00000000    000000c8   000000c8    r-- .intvecs
    00000000    00000000    00004b70   00004b70    r--
      00000000    00000000    00004b70   00004b70    r-- .const
    000000c8    000000c8    000059ba   000059ba    r-x
      000000c8    000000c8    000059ba   000059ba    r-x .text
    00005a84    00005a84    00000008   00000008    rw-
      00005a84    00005a84    00000008   00000008    rw- .args
    00005a90    00005a90    000001d8   000001d8    r--
      00005a90    00005a90    000001d8   000001d8    r-- .cinit
    00007fa8    00007fa8    00000058   00000058    r--
      00007fa8    00007fa8    00000058   00000058    r-- .ccfg
    20000000    20000000    00001789   00000000    rw-
      20000000    20000000    00000b2c   00000000    rw- .data
      20000b30    20000b30    00000800   00000000    rw- .sysmem
      20001330    20001330    00000459   00000000    rw- .bss
    20001800    20001800    000000c8   00000000    rw-
      20001800    20001800    000000c8   00000000    rw- .vtable_ram
    20003800    20003800    00000800   00000000    rw-
      20003800    20003800    00000800   00000000    rw- .stack

    and what a miracle the .const data allocation INCREASED to more the 19Kb !!!!!!

    That is not a fair high quality sample project, I would say it seems like.

    Anybody an idea what these .const data are ? Why do the size increase with highest level of optimization for size ?

    Just to clarify, I am using the compiler tools versions the SDK requires.

    Best wishes

    Ralph

  • 0 in reply to Ralph Deffke
    TI__Genius 10610 points

    Ralph,

    I'm able to recreate what you are seeing. Let me contact our compiler experts to see if they have any suggestions. 

    In the meantime, if you go to View > Memory Allocation, you can view a graphical representation of Flash and SRAM usage. In the case of this example, it looks like the SmartRF Settings (which are generated once to allow for interoperability between devices) are taking up a lot of Flash. I'll continue to investigate this.

    Regards,

    Daniel

  • 0 in reply to daniel_o
    Expert 2915 points

    Nice,

    at least I am not doing wrong. Compiler is 18.12.6 but I see same in 20.x.x

    nice weekend

    Ralph

  • 0 in reply to Ralph Deffke
    TI__Genius 10610 points

    Ralph,

    Please try removing the PHYs you aren't using from Predefined Symbols in your project settings. Doing this will make the example fit in the CC1310F32 memory. (An easy way to do this is to add an "x" in front of the pre-define.) In the screenshot below I removed all PHYs except for SUPPORT_PHY_CUSTOM.

    Regards,

    Daniel