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Part Number: CC1120
Just looking for continous improvement we measured CC1120 sensivity with our typical setup:
12.5kHz CHBW, 3k DEV, 4k symbol rate at 434MHz, starting with our still favorite transparent mode.RF generator: Marconi / AgilentResults of BER test:
First of all results of original dev.kit was lausy with -110.5. So we changed CC1120 to an actual revision plus we put our standard TCXO (which is used in all our CC-designs).Surprisingly we got 6dB better perfomance!
Measuring our own modul we achieve ~1.5dB less.
But it's still far away from the -123dBm which should be possible according data sheet.Could you experts have look at our design and point those areas where we could achieve certain improvements?
Schematic follows strict TI reference, exception is the antenna RF switch - but this (ANT1 at CON5) is not used, L174 is not placed - L174_2 instead.And: we want to be open to use that modul not only with our standard pin headers, but also with side platings. That's why we have these solder pads at the edge.Coils are WW
The board layout (4Layer):
Or, with GND ratsnest plus Vias
Remark: we measured with packet mode too, no better results
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In reply to GGA:
I have to look closer on it tomorrow, but what is the signal bandwidth of this signal? And how many ppm frequency offset do you get with this? FSK or GFSK?
In reply to TER:
We used 4kBaud data rate and 50% duty cycle; any lower datarate didn't show better results.
Not sure how we measure the freq.offset in RX operations... But our TCXO is a 2ppm type.The orginal EVK-crystal had a ~2-3kHz offset, but even with that I would expect that the AFC would fix it, even in packet mode with a 2 byte preamble which we used.
We use GFSK only.
I can see two potential main issues:
To check the hardware you need known good settings. I would suggest you test with the 1.2 kbps using Studio or software using 3 byte packets, fixed packet length, and see if you get close to datasheet numbers here.
Is IC7 mounted and could you potentially get an impedance issue if it is? Which impedance is seen into the RF2 pin on the switch?
TER,we'll do those measurements early the week and com back to you.
IC7 and L174 is not mounted (L174_2 instead of course) - I guess the impedance question should be obsolet?
We made the measurements and in packet mode, default for 1.2kb max. sens. preset, we got the expected -123 with your EVK (TCXO equipped).
In transparent mode, still our main focus for legacy reasons, it's ~-119-120, so ~3dB less, using the same EVK. Any idea why?
With our own modul, it's ~-117, so again 2-3dB less than the EVK. So there is a potential HW issue on top;
however we use in our modul 12.5k CHBW, 3kDEV and 100kB data rate (just the maximum: we figured out in painful early times that in your DSP datarate has a connection to sample rate and jitter in transparent mode. Even if it doesn't make any difference in transprent mode on the RF part).
But the setting can't make that difference: if I put the EVK to the same setting values there is no change in sensivity.
Any hint welcome!
Packet mode vs transparent: In packet mode we use a correlation based sync search. If a bit by bit based sync search is used (as in transparent mode) the sync search will limit sensitivity. In addition, as discussed before, the transparent mode signal is taken out earlier in the RX chain than the packet RX signal and hence less processed.
It's a bit difficult to see on the plots but I have seen cases where the length of the TRX trace impact sensitivity. If this trace is longer than it's on the reference design, sensitivity can be impacted.
Not sure if I fully understood the last part. Does this mean that if using your board and the EM you get exactly the same sensitivity if you use your wanted settings?
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