Other Parts Discussed in Thread: SEGGER
Hi TI and other CC1352R enthusiasts,
We have an issue regarding locking the CC1352R1F3 during our (mass-)production. We want that the chip will be not-readable, not writeable, and also not able to debug. But a chip erase via (c)JTAG must be possible in all cases! This is so we can re-program units from the 'field' and for debugging purposes.
I'm struggling to find the right defines to make this happen. If I set the this:
SET_CCFG_CCFG_TAP_DAP_0_PWRPROF_TAP_ENABLE (0)
SET_CCFG_CCFG_TAP_DAP_0_CPU_DAP_ENABLE (0)
, then our CC1352R gets bricked and then I can never use the chip erase again!
Can you help us to find the correct defines to have a locked CC1352R, but always chip erase-able?
The only option for us to connect to the CC1352R is via (c)JTAG.
What I've come up until so far:
// The valid image starts at address 0
#define SET_CCFG_IMAGE_VALID_CONF_IMAGE_VALID (0)
// Always allow a full chip erase
#define SET_CCFG_ERASE_CONF_CHIP_ERASE_DIS_N 0x1
// Access enabled if also enabled in FCFG
#define SET_CCFG_CCFG_TAP_DAP_0_CPU_DAP_ENABLE 0x0
// Access enabled if also enabled in FCFG
#define SET_CCFG_CCFG_TAP_DAP_0_PWRPROF_TAP_ENABLE 0x0
Thank you!