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CC1352R: SC/MCU memory atomicity

Adam Kozlowski
Expert 1805 points
Part Number: CC1352R

Hi

I have two periodic tasks, one on SC and one on MCU.
I use a small memory region to exchange data between these tasks (50B).
Tasks are independent, operate on different cores, and therefore they can read/write to this memory region concurrently.
I want to avoid a theoretically possible situation, where SC reads the region updated only partially by MCU.

How can I implement functionality to treat this memory region as being atomic?
When the SC reads this region, the MCU waits to write.

Reading the manual, I found AUX semaphore (AUX_SMPH), dedicated to managing peripheral ownership. There are three slots available to use.

Do I have to use this feature?
Is there anything more appropriate?


Regards
Adam


  • 0
    TI__Guru* 79321 points

    Hi

    I think the best solution here would be to implement a double buffer, and a variable telling which of the buffers are being used by the MCU.

    On the SC, you should check to see which buffers are in use by the MCU, and then read the other one.

    Using semaphores might not be a good idea, if the CS is pending on the semaphore, and then suddenly the MCU gets occupied with other tasks.

    BR

    Siri

  • 0 in reply to Siri
    Expert 1805 points

    Hi,

    Siri said:
    I think the best solution here would be to implement a double buffer, and a variable telling which of the buffers are being used by the MCU.

    Interesting and straightforward idea. Thanks.

    Regards
    Adam